2 SPDX-License-Identifier: BSD-2-Clause
4 Copyright (c) 2007-2009, Chelsio Inc.
64 enum {                            /* adapter interrupt-maintained statistics */
141 #define WR_FLITS (TX_DESC_FLITS + 1 - SGE_NUM_GENBITS)
157 	unsigned char          phy_base_addr;  /* MDIO PHY base address */
159 	unsigned char gpio_intr[MAX_PHYINTRS]; /* GPIO PHY IRQ pins */
339 /* MC5 modes, these must be non-0 */
398 	unsigned int   chan_map;            /* bitmap of in-use Tx channels */
456 	return p->tcam_size;  in t3_mc5_size()
470 	return p->size;  in t3_mc7_size()
520 /* PHY loopback direction */
526 /* PHY interrupt types */
534 /* PHY module types */
551 /* PHY operations */
553 	int (*reset)(struct cphy *phy, int wait);
555 	int (*intr_enable)(struct cphy *phy);
556 	int (*intr_disable)(struct cphy *phy);
557 	int (*intr_clear)(struct cphy *phy);
558 	int (*intr_handler)(struct cphy *phy);
560 	int (*autoneg_enable)(struct cphy *phy);
561 	int (*autoneg_restart)(struct cphy *phy);
563 	int (*advertise)(struct cphy *phy, unsigned int advertise_map);
564 	int (*set_loopback)(struct cphy *phy, int mmd, int dir, int enable);
565 	int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
566 	int (*get_link_status)(struct cphy *phy, int *link_state, int *speed,
568 	int (*power_down)(struct cphy *phy, int enable);
571 /* A PHY instance */
573 	u8 addr;                             /* PHY address */
574 	u8 modtype;                          /* PHY module type */
577 	unsigned int caps;                   /* PHY capabilities */
580 	const char *desc;                    /* PHY description */
581 	unsigned long fifo_errors;           /* FIFO over/under-flows */
582 	const struct cphy_ops *ops;          /* PHY operations */
590 static inline int mdio_read(struct cphy *phy, int mmd, int reg,  in mdio_read()  argument
593 	return phy->mdio_read(phy->adapter, phy->addr, mmd, reg, valp);  in mdio_read()
596 static inline int mdio_write(struct cphy *phy, int mmd, int reg,  in mdio_write()  argument
599 	return phy->mdio_write(phy->adapter, phy->addr, mmd, reg, val);  in mdio_write()
603 static inline void cphy_init(struct cphy *phy, adapter_t *adapter, pinfo_t *pinfo,  in cphy_init()  argument
608 	phy->addr    = (u8)phy_addr;  in cphy_init()
609 	phy->caps    = caps;  in cphy_init()
610 	phy->adapter = adapter;  in cphy_init()
611 	phy->pinfo   = pinfo;  in cphy_init()
612 	phy->desc    = desc;  in cphy_init()
613 	phy->ops     = phy_ops;  in cphy_init()
615 		phy->mdio_read  = mdio_ops->read;  in cphy_init()
616 		phy->mdio_write = mdio_ops->write;  in cphy_init()
627 	((reg_addr) + (idx) * (XGMAC0_1_BASE_ADDR - XGMAC0_0_BASE_ADDR))
641 	for (iter = 0; iter < (adapter)->params.nports; ++iter)
643 #define adapter_info(adap) ((adap)->params.info)
647 	return adapter_info(adap)->caps & SUPPORTED_AUI;  in uses_xaui()
652 	return adapter_info(adap)->caps & SUPPORTED_10000baseT_Full;  in is_10G()
657 	return adap->params.offload;  in is_offload()
662 	return adap->params.vpd.cclk / 1000;  in core_ticks_per_usec()
668 	return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap);  in dack_ticks_to_usec()
673 	return adap->params.pci.variant == PCI_VARIANT_PCIE;  in is_pcie()
689 int t3_mdio_change_bits(struct cphy *phy, int mmd, int reg, unsigned int clear,
691 int t3_phy_reset(struct cphy *phy, int mmd, int wait);
692 int t3_phy_advertise(struct cphy *phy, unsigned int advert);
693 int t3_phy_advertise_fiber(struct cphy *phy, unsigned int advert);
694 int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex);
695 int t3_phy_lasi_intr_enable(struct cphy *phy);
696 int t3_phy_lasi_intr_disable(struct cphy *phy);
697 int t3_phy_lasi_intr_clear(struct cphy *phy);
698 int t3_phy_lasi_intr_handler(struct cphy *phy);
711 int t3_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
802 int t3_sge_init_ecntxt(adapter_t *adapter, unsigned int id, int gts_enable,
806 int t3_sge_init_flcntxt(adapter_t *adapter, unsigned int id, int gts_enable,
809 int t3_sge_init_rspcntxt(adapter_t *adapter, unsigned int id, int irq_vec_idx,
812 int t3_sge_init_cqcntxt(adapter_t *adapter, unsigned int id, u64 base_addr,
815 int t3_sge_enable_ecntxt(adapter_t *adapter, unsigned int id, int enable);
816 int t3_sge_disable_fl(adapter_t *adapter, unsigned int id);
817 int t3_sge_disable_rspcntxt(adapter_t *adapter, unsigned int id);
818 int t3_sge_disable_cqcntxt(adapter_t *adapter, unsigned int id);
819 int t3_sge_read_ecntxt(adapter_t *adapter, unsigned int id, u32 data[4]);
820 int t3_sge_read_fl(adapter_t *adapter, unsigned int id, u32 data[4]);
821 int t3_sge_read_cq(adapter_t *adapter, unsigned int id, u32 data[4]);
822 int t3_sge_read_rspq(adapter_t *adapter, unsigned int id, u32 data[4]);
823 int t3_sge_cqcntxt_op(adapter_t *adapter, unsigned int id, unsigned int op,