Lines Matching full:int
148 int (*read)(adapter_t *adapter, int phy_addr, int mmd_addr,
149 int reg_addr, unsigned int *val);
150 int (*write)(adapter_t *adapter, int phy_addr, int mmd_addr,
151 int reg_addr, unsigned int val);
158 unsigned int gpio_out; /* GPIO output settings */
293 unsigned int nchan; /* # of channels */
294 unsigned int pmrx_size; /* total PMRX capacity */
295 unsigned int pmtx_size; /* total PMTX capacity */
296 unsigned int cm_size; /* total CM capacity */
297 unsigned int chan_rx_size; /* per channel Rx size */
298 unsigned int chan_tx_size; /* per channel Tx size */
299 unsigned int rx_pg_size; /* Rx page size */
300 unsigned int tx_pg_size; /* Tx page size */
301 unsigned int rx_num_pgs; /* # of Rx pages */
302 unsigned int tx_num_pgs; /* # of Tx pages */
303 unsigned int ntimer_qs; /* # of timer queues */
304 unsigned int tre; /* log2 of core clocks per TP tick */
305 unsigned int dack_re; /* DACK timer resolution */
309 unsigned int polling; /* polling/interrupt service for rspq */
310 unsigned int lro; /* large receive offload */
311 unsigned int coalesce_usecs; /* irq coalescing timer */
312 unsigned int rspq_size; /* # of entries in response queue */
313 unsigned int fl_size; /* # of entries in regular free list */
314 unsigned int jumbo_size; /* # of entries in jumbo free list */
315 unsigned int jumbo_buf_size; /* buffer size of jumbo entry */
316 unsigned int txq_size[SGE_TXQ_PER_SET]; /* Tx queue sizes */
317 unsigned int cong_thres; /* FL congestion threshold */
318 unsigned int vector; /* Interrupt (line or vector) number */
322 unsigned int max_pkt_size; /* max offload pkt size */
327 unsigned int mode; /* selects MC5 width */
328 unsigned int nservers; /* size of server region */
329 unsigned int nfilters; /* size of filter region */
330 unsigned int nroutes; /* size of routing region */
349 unsigned int cclk;
350 unsigned int mclk;
351 unsigned int uclk;
352 unsigned int mdc;
353 unsigned int mem_timing;
370 unsigned int vpd_cap_addr;
371 unsigned int pcie_cap_addr;
397 unsigned int nports; /* # of ethernet ports */
398 unsigned int chan_map; /* bitmap of in-use Tx channels */
399 unsigned int stats_update_period; /* MAC stats accumulation period */
400 unsigned int linkpoll_period; /* link poll period in 0.1s */
401 unsigned int rev; /* chip revision */
402 unsigned int offload;
430 unsigned int supported; /* link capabilities */
431 unsigned int advertising; /* advertised capabilities */
439 unsigned int link_ok; /* link up? */
447 unsigned int tcam_size;
454 static inline unsigned int t3_mc5_size(const struct mc5 *p) in t3_mc5_size()
461 unsigned int size; /* memory size in bytes */
462 unsigned int width; /* MC7 interface width */
463 unsigned int offset; /* register address offset for MC7 instance */
468 static inline unsigned int t3_mc7_size(const struct mc7 *p) in t3_mc7_size()
475 unsigned int offset;
480 unsigned int tx_tcnt;
481 unsigned int tx_xcnt;
483 unsigned int rx_xcnt;
484 unsigned int rx_ocnt;
486 unsigned int toggle_cnt;
487 unsigned int txen;
488 unsigned int was_reset;
553 int (*reset)(struct cphy *phy, int wait);
555 int (*intr_enable)(struct cphy *phy);
556 int (*intr_disable)(struct cphy *phy);
557 int (*intr_clear)(struct cphy *phy);
558 int (*intr_handler)(struct cphy *phy);
560 int (*autoneg_enable)(struct cphy *phy);
561 int (*autoneg_restart)(struct cphy *phy);
563 int (*advertise)(struct cphy *phy, unsigned int advertise_map);
564 int (*set_loopback)(struct cphy *phy, int mmd, int dir, int enable);
565 int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
566 int (*get_link_status)(struct cphy *phy, int *link_state, int *speed,
567 int *duplex, int *fc);
568 int (*power_down)(struct cphy *phy, int enable);
576 unsigned int priv; /* scratch pad */
577 unsigned int caps; /* PHY capabilities */
583 int (*mdio_read)(adapter_t *adapter, int phy_addr, int mmd_addr,
584 int reg_addr, unsigned int *val);
585 int (*mdio_write)(adapter_t *adapter, int phy_addr, int mmd_addr,
586 int reg_addr, unsigned int val);
590 static inline int mdio_read(struct cphy *phy, int mmd, int reg, in mdio_read()
591 unsigned int *valp) in mdio_read()
596 static inline int mdio_write(struct cphy *phy, int mmd, int reg, in mdio_write()
597 unsigned int val) in mdio_write()
604 int phy_addr, struct cphy_ops *phy_ops, in cphy_init()
605 const struct mdio_ops *mdio_ops, unsigned int caps, in cphy_init()
630 unsigned int reg_addr;
631 unsigned int val;
645 static inline int uses_xaui(const adapter_t *adap) in uses_xaui()
650 static inline int is_10G(const adapter_t *adap) in is_10G()
655 static inline int is_offload(const adapter_t *adap) in is_offload()
660 static inline unsigned int core_ticks_per_usec(const adapter_t *adap) in core_ticks_per_usec()
665 static inline unsigned int dack_ticks_to_usec(const adapter_t *adap, in dack_ticks_to_usec()
666 unsigned int ticks) in dack_ticks_to_usec()
671 static inline unsigned int is_pcie(const adapter_t *adap) in is_pcie()
676 void t3_set_reg_field(adapter_t *adap, unsigned int addr, u32 mask, u32 val);
677 void t3_write_regs(adapter_t *adapter, const struct addr_val_pair *p, int n,
678 unsigned int offset);
679 int t3_wait_op_done_val(adapter_t *adapter, int reg, u32 mask, int polarity,
680 int attempts, int delay, u32 *valp);
682 static inline int t3_wait_op_done(adapter_t *adapter, int reg, u32 mask, in t3_wait_op_done()
683 int polarity, int attempts, int delay) in t3_wait_op_done()
689 int t3_mdio_change_bits(struct cphy *phy, int mmd, int reg, unsigned int clear,
690 unsigned int set);
691 int t3_phy_reset(struct cphy *phy, int mmd, int wait);
692 int t3_phy_advertise(struct cphy *phy, unsigned int advert);
693 int t3_phy_advertise_fiber(struct cphy *phy, unsigned int advert);
694 int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex);
695 int t3_phy_lasi_intr_enable(struct cphy *phy);
696 int t3_phy_lasi_intr_disable(struct cphy *phy);
697 int t3_phy_lasi_intr_clear(struct cphy *phy);
698 int t3_phy_lasi_intr_handler(struct cphy *phy);
703 void t3_xgm_intr_enable(adapter_t *adapter, int idx);
704 void t3_xgm_intr_disable(adapter_t *adapter, int idx);
705 void t3_port_intr_enable(adapter_t *adapter, int idx);
706 void t3_port_intr_disable(adapter_t *adapter, int idx);
707 void t3_port_intr_clear(adapter_t *adapter, int idx);
708 int t3_slow_intr_handler(adapter_t *adapter);
710 void t3_link_changed(adapter_t *adapter, int port_id);
711 int t3_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
712 const struct adapter_info *t3_get_adapter_info(unsigned int board_id);
713 int t3_seeprom_read(adapter_t *adapter, u32 addr, u32 *data);
714 int t3_seeprom_write(adapter_t *adapter, u32 addr, u32 data);
715 int t3_seeprom_wp(adapter_t *adapter, int enable);
716 int t3_get_vpd_len(adapter_t *adapter, struct generic_vpd *vpd);
717 int t3_read_vpd(adapter_t *adapter, struct generic_vpd *vpd);
718 int t3_read_flash(adapter_t *adapter, unsigned int addr, unsigned int nwords,
719 u32 *data, int byte_oriented);
720 int t3_get_tp_version(adapter_t *adapter, u32 *vers);
721 int t3_check_tpsram_version(adapter_t *adapter);
722 int t3_check_tpsram(adapter_t *adapter, const u8 *tp_ram, unsigned int size);
723 int t3_load_fw(adapter_t *adapter, const u8 *fw_data, unsigned int size);
724 int t3_get_fw_version(adapter_t *adapter, u32 *vers);
725 int t3_check_fw_version(adapter_t *adapter);
726 int t3_load_boot(adapter_t *adapter, u8 *fw_data, unsigned int size);
727 int t3_init_hw(adapter_t *adapter, u32 fw_params);
728 void mac_prep(struct cmac *mac, adapter_t *adapter, int index);
730 int t3_reset_adapter(adapter_t *adapter);
731 int t3_prep_adapter(adapter_t *adapter, const struct adapter_info *ai, int reset);
732 int t3_reinit_adapter(adapter_t *adap);
735 void t3_set_vlan_accel(adapter_t *adapter, unsigned int ports, int on);
738 void t3_tp_set_offload_mode(adapter_t *adap, int enable);
739 void t3_config_rss(adapter_t *adapter, unsigned int rss_config, const u8 *cpus,
741 int t3_read_rss(adapter_t *adapter, u8 *lkup, u16 *map);
742 int t3_set_proto_sram(adapter_t *adap, const u8 *data);
743 int t3_mps_set_active_ports(adapter_t *adap, unsigned int port_mask);
744 void t3_port_failover(adapter_t *adapter, int port);
745 void t3_failover_done(adapter_t *adapter, int port);
747 int t3_cim_ctl_blk_read(adapter_t *adap, unsigned int addr, unsigned int n,
748 unsigned int *valp);
749 int t3_mc7_bd_read(struct mc7 *mc7, unsigned int start, unsigned int n,
752 int t3_mac_init(struct cmac *mac);
757 int t3_mac_enable(struct cmac *mac, int which);
758 int t3_mac_disable(struct cmac *mac, int which);
759 int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu);
760 int t3_mac_set_rx_mode(struct cmac *mac, struct t3_rx_mode *rm);
761 int t3_mac_set_address(struct cmac *mac, unsigned int idx, u8 addr[6]);
762 int t3_mac_set_num_ucast(struct cmac *mac, unsigned char n);
764 int t3_mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex,
765 int fc);
766 int t3b2_mac_watchdog_task(struct cmac *mac);
768 void t3_mc5_prep(adapter_t *adapter, struct mc5 *mc5, int mode);
769 int t3_mc5_init(struct mc5 *mc5, unsigned int nservers, unsigned int nfilters,
770 unsigned int nroutes);
772 int t3_read_mc5_range(const struct mc5 *mc5, unsigned int start, unsigned int n,
775 int t3_tp_set_coalescing_size(adapter_t *adap, unsigned int size, int psh);
776 void t3_tp_set_max_rxsize(adapter_t *adap, unsigned int size);
785 int filter_index, int invert, int enable);
787 int filter_index, int *inverted, int *enabled);
788 int t3_config_sched(adapter_t *adap, unsigned int kbps, int sched);
789 int t3_set_sched_ipg(adapter_t *adap, int sched, unsigned int ipg);
790 void t3_get_tx_sched(adapter_t *adap, unsigned int sched, unsigned int *kbps,
791 unsigned int *ipg);
792 void t3_read_pace_tbl(adapter_t *adap, unsigned int pace_vals[NTX_SCHED]);
793 void t3_set_pace_tbl(adapter_t *adap, unsigned int *pace_vals,
794 unsigned int start, unsigned int n);
796 int t3_get_up_la(adapter_t *adapter, u32 *stopped, u32 *index,
798 int t3_get_up_ioqs(adapter_t *adapter, u32 *size, void *data);
802 int t3_sge_init_ecntxt(adapter_t *adapter, unsigned int id, int gts_enable,
803 enum sge_context_type type, int respq, u64 base_addr,
804 unsigned int size, unsigned int token, int gen,
805 unsigned int cidx);
806 int t3_sge_init_flcntxt(adapter_t *adapter, unsigned int id, int gts_enable,
807 u64 base_addr, unsigned int size, unsigned int esize,
808 unsigned int cong_thres, int gen, unsigned int cidx);
809 int t3_sge_init_rspcntxt(adapter_t *adapter, unsigned int id, int irq_vec_idx,
810 u64 base_addr, unsigned int size,
811 unsigned int fl_thres, int gen, unsigned int cidx);
812 int t3_sge_init_cqcntxt(adapter_t *adapter, unsigned int id, u64 base_addr,
813 unsigned int size, int rspq, int ovfl_mode,
814 unsigned int credits, unsigned int credit_thres);
815 int t3_sge_enable_ecntxt(adapter_t *adapter, unsigned int id, int enable);
816 int t3_sge_disable_fl(adapter_t *adapter, unsigned int id);
817 int t3_sge_disable_rspcntxt(adapter_t *adapter, unsigned int id);
818 int t3_sge_disable_cqcntxt(adapter_t *adapter, unsigned int id);
819 int t3_sge_read_ecntxt(adapter_t *adapter, unsigned int id, u32 data[4]);
820 int t3_sge_read_fl(adapter_t *adapter, unsigned int id, u32 data[4]);
821 int t3_sge_read_cq(adapter_t *adapter, unsigned int id, u32 data[4]);
822 int t3_sge_read_rspq(adapter_t *adapter, unsigned int id, u32 data[4]);
823 int t3_sge_cqcntxt_op(adapter_t *adapter, unsigned int id, unsigned int op,
824 unsigned int credits);
826 int t3_elmr_blk_write(adapter_t *adap, int start, const u32 *vals, int n);
827 int t3_elmr_blk_read(adapter_t *adap, int start, u32 *vals, int n);
828 int t3_vsc7323_init(adapter_t *adap, int nports);
829 int t3_vsc7323_set_speed_fc(adapter_t *adap, int speed, int fc, int port);
830 int t3_vsc7323_set_mtu(adapter_t *adap, unsigned int mtu, int port);
831 int t3_vsc7323_set_addr(adapter_t *adap, u8 addr[6], int port);
832 int t3_vsc7323_enable(adapter_t *adap, int port, int which);
833 int t3_vsc7323_disable(adapter_t *adap, int port, int which);
836 int t3_i2c_read8(adapter_t *adapter, int chained, u8 *valp);
837 int t3_i2c_write8(adapter_t *adapter, int chained, u8 val);
839 int t3_mi1_read(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr,
840 unsigned int *valp);
841 int t3_mi1_write(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr,
842 unsigned int val);
844 int t3_mv88e1xxx_phy_prep(pinfo_t *pinfo, int phy_addr,
846 int t3_vsc8211_phy_prep(pinfo_t *pinfo, int phy_addr,
848 int t3_vsc8211_fifo_depth(adapter_t *adap, unsigned int mtu, int port);
849 int t3_ael1002_phy_prep(pinfo_t *pinfo, int phy_addr,
851 int t3_ael1006_phy_prep(pinfo_t *pinfo, int phy_addr,
853 int t3_ael2005_phy_prep(pinfo_t *pinfo, int phy_addr,
855 int t3_ael2020_phy_prep(pinfo_t *pinfo, int phy_addr,
857 int t3_qt2045_phy_prep(pinfo_t *pinfo, int phy_addr,
859 int t3_tn1010_phy_prep(pinfo_t *pinfo, int phy_addr,
861 int t3_xaui_direct_phy_prep(pinfo_t *pinfo, int phy_addr,
863 int t3_aq100x_phy_prep(pinfo_t *pinfo, int phy_addr,