Lines Matching +full:board +full:- +full:specific
1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 1999-2015, Broadcom Corporation
9 * with the dd-wrt project, and the hndsoc.h header distributed with Broadcom's
30 * JEDEC JEP-106 Core Vendor IDs
32 * These are the JEDEC JEP-106 manufacturer ID representions (with ARM's
33 * non-standard 4-bit continutation code), as used in ARM's PrimeCell
38 * will need to convert bus-specific vendor IDs to their BHND_MFGID
39 * JEP-106 equivalents.
41 * @par ARM 4-bit Continuation Code
43 * BHND MFGIDs are encoded using ARM's non-standard 4-bit continuation code
51 * The 4-bit continuation code field specifies the number of JEP-106
53 * ARM's JEP-106 ID of `0x7F 0x7F 0x7F 0x7F 0x3B`, the four 0x7F continuations
54 * are encoded as '4' in the 4-bit continuation code field (i.e. 0x43B).
56 #define BHND_MFGID_ARM 0x043b /**< arm JEP-106 vendor id */
57 #define BHND_MFGID_BCM 0x04bf /**< broadcom JEP-106 vendor id */
58 #define BHND_MFGID_MIPS 0x04a7 /**< mips JEP-106 vendor id */
59 #define BHND_MFGID_INVALID 0x0000 /**< invalid JEP-106 vendor id */
64 * OCP-IP assigned vendor codes are used by siba(4)
170 #define PCI_DEVID_BCM43224_D11N_ID_VEN1 0x0576 /* Vendor specific 43224 802.11n db device */
383 #define BHND_PKGID_BCM4329_289PIN 0 /* 4329 289-pin package id */
384 #define BHND_PKGID_BCM4329_182PIN 1 /* 4329N 182-pin package id */
414 #define BHND_PKGID_BCM4314PCIE (8 | 2) /* 4314 QFN PCI (ARM-less) package id */
415 #define BHND_PKGID_BCM4314SDIO_ARM (8 | 3) /* 4314 QFN SDIO (ARM-less) package id */
468 #define BHND_COREID_ARM7S 0x825 /* ARM7tdmi-s core */
471 #define BHND_COREID_SSNPHY 0x828 /* 802.11n single-stream phy core */
488 #define BHND_COREID_APB_BRIDGE 0x135 /* BP135 AMBA AXI-APB bridge */
514 * PrimeCell-compatible BCM4331 cores, but due to lack of documentation, the
529 /** Evaluates to true if @p _type is a BCMA or BCMA-compatible interconenct */
541 #define BHND_BFL_BTCOEX 0x00000001 /* Board supports BTCOEX */
542 #define BHND_BFL_PACTRL 0x00000002 /* Board has gpio 9 controlling the PA */
543 #define BHND_BFL_AIRLINEMODE 0x00000004 /* Board implements gpio 13 radio disable indication, UNUS…
544 #define BHND_BFL_ADCDIV 0x00000008 /* Board has the rssi ADC divider */
546 #define BHND_BFL_ENETROBO 0x00000010 /* Board has robo switch or core */
548 #define BHND_BFL_CCKHIPWR 0x00000040 /* Can do high-power CCK transmission */
549 #define BHND_BFL_ENETADM 0x00000080 /* Board has ADMtek switch */
550 #define BHND_BFL_ENETVLAN 0x00000100 /* Board has VLAN capability */
551 #define BHND_BFL_LTECOEX 0x00000200 /* Board has LTE coex capability */
552 #define BHND_BFL_NOPCI 0x00000400 /* Board leaves PCI floating */
553 #define BHND_BFL_FEM 0x00000800 /* Board supports the Front End Module */
554 #define BHND_BFL_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */
555 #define BHND_BFL_HGPA 0x00002000 /* Board has a high gain PA */
557 /* Board's BTC 2wire is in the alternate gpios OBSLETE */
559 #define BHND_BFL_NOPA 0x00010000 /* Board has no PA */
560 #define BHND_BFL_RSSIINV 0x00020000 /* Board's RSSI uses positive slope(not TSSI) */
561 #define BHND_BFL_PAREF 0x00040000 /* Board uses the PARef LDO */
562 #define BHND_BFL_3TSWITCH 0x00080000 /* Board uses a triple throw switch shared with BT */
563 #define BHND_BFL_PHASESHIFT 0x00100000 /* Board can support phase shifter */
565 #define BHND_BFL_FEM_BT 0x00400000 /* Board has FEM and switch to share antenna w/ BT */
573 #define BHND_BFL_EXTLNA_5GHZ 0x10000000 /* Board has an external LNA in 5GHz band */
574 #define BHND_BFL_TRSW_1BY2 0x20000000 /* Board has 2 TRSW's in 1by2 designs */
583 #define BHND_BFL2_RXBB_INT_REG_DIS 0x00000001 /* Board has an external rxbb regulator */
584 #define BHND_BFL2_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */
585 #define BHND_BFL2_TXPWRCTRL_EN 0x00000004 /* Board permits enabling TX Power Control */
586 #define BHND_BFL2_2X4_DIV 0x00000008 /* Board supports the 2X4 diversity switch */
587 #define BHND_BFL2_5G_PWRGAIN 0x00000010 /* Board supports 5G band power gain */
588 #define BHND_BFL2_PCIEWAR_OVR 0x00000020 /* Board overrides ASPM and Clkreq settings */
589 #define BHND_BFL2_CAESERS_BRD 0x00000040 /* Board is Caesers brd (unused by sw) */
590 #define BHND_BFL2_BTC3WIRE 0x00000080 /* Board support legacy 3 wire or 4 wire */
591 #define BHND_BFL2_BTCLEGACY 0x00000080 /* Board support legacy 3/4 wire, to replace
594 #define BHND_BFL2_SKWRKFEM_BRD 0x00000100 /* 4321mcm93 board uses Skyworks FEM */
595 #define BHND_BFL2_SPUR_WAR 0x00000200 /* Board has a WAR for clock-harmonic spurs */
596 #define BHND_BFL2_GPLL_WAR 0x00000400 /* Flag to narrow G-band PLL loop b/w */
597 #define BHND_BFL2_TRISTATE_LED 0x00000800 /* Tri-state the LED */
599 #define BHND_BFL2_2G_SPUR_WAR 0x00002000 /* WAR to reduce and avoid clock-harmonic spurs in 2G */
602 #define BHND_BFL2_GPLL_WAR2 0x00010000 /* Flag to widen G-band PLL loop b/w */
624 /* board rework */
630 /* SROM 11 - 11ac boardflag definitions */
631 #define BHND_BFL_SROM11_BTCOEX 0x00000001 /* Board supports BTCOEX */
633 #define BHND_BFL_SROM11_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */
634 #define BHND_BFL_SROM11_EXTLNA_5GHZ 0x10000000 /* Board has an external LNA in 5GHz band */
636 #define BHND_BFL2_SROM11_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */
637 #define BHND_BFL2_SROM11_ANAPACTRL_2G 0x00100000 /* 2G ext PAs are ctrl-ed by analog PA ctrl lines …
638 #define BHND_BFL2_SROM11_ANAPACTRL_5G 0x00200000 /* 5G ext PAs are ctrl-ed by analog PA ctrl lines …
642 #define BHND_BFL3_RCAL_WAR 0x00000008 /* acphy, rcal war active on this board (4335a0) */
663 #define BHND_BFL3_EN_NONBRCM_TXBF 0x10000000 /* acphy, enable non-brcm TXBF */
666 /* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */
680 #define BHND_GPIO_BOARD_1_WLAN_PWR 0x02 /* throttle WLAN power on X21 board */
681 #define BHND_GPIO_BOARD_3_WLAN_PWR 0x08 /* throttle WLAN power on X28 board */
682 #define BHND_GPIO_BOARD_4_WLAN_PWR 0x10 /* throttle WLAN power on X19 board */
692 /* Board Types */
724 /* BCM4702 1U CompactPCI Board */
742 /* 11a-only minipci */
927 /* 4336 SDIO board types */
935 /* 4330 SDIO board types */
1064 /* 4354 board types */
1092 * Note: these differ for 4335a0. refer bcmchipc.h for specific mux options.