Lines Matching +full:4 +full:ghz +full:- +full:coexistence
1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 1999-2015, Broadcom Corporation
9 * with the dd-wrt project, and the hndsoc.h header distributed with Broadcom's
30 * JEDEC JEP-106 Core Vendor IDs
32 * These are the JEDEC JEP-106 manufacturer ID representions (with ARM's
33 * non-standard 4-bit continutation code), as used in ARM's PrimeCell
34 * identification registers, bcma(4) EROM core descriptors, etc.
38 * will need to convert bus-specific vendor IDs to their BHND_MFGID
39 * JEP-106 equivalents.
41 * @par ARM 4-bit Continuation Code
43 * BHND MFGIDs are encoded using ARM's non-standard 4-bit continuation code
51 * The 4-bit continuation code field specifies the number of JEP-106
53 * ARM's JEP-106 ID of `0x7F 0x7F 0x7F 0x7F 0x3B`, the four 0x7F continuations
54 * are encoded as '4' in the 4-bit continuation code field (i.e. 0x43B).
56 #define BHND_MFGID_ARM 0x043b /**< arm JEP-106 vendor id */
57 #define BHND_MFGID_BCM 0x04bf /**< broadcom JEP-106 vendor id */
58 #define BHND_MFGID_MIPS 0x04a7 /**< mips JEP-106 vendor id */
59 #define BHND_MFGID_INVALID 0x0000 /**< invalid JEP-106 vendor id */
64 * OCP-IP assigned vendor codes are used by siba(4)
150 #define PCI_DEVID_BCM4321_D11N2G 0x4329 /* 4321 802.11n 2.4Ghz band id */
151 #define PCI_DEVID_BCM4321_D11N5G 0x432a /* 4321 802.11n 5Ghz band id */
153 #define PCI_DEVID_BCM4322_D11N2G 0x432c /* 4322 802.11n 2.4GHz device */
154 #define PCI_DEVID_BCM4322_D11N5G 0x432d /* 4322 802.11n 5GHz device */
164 #define PCI_DEVID_BCM43231_D11N2G 0x4340 /* 43231 802.11n 2.4GHz device */
165 #define PCI_DEVID_BCM43221_D11N2G 0x4341 /* 43221 802.11n 2.4GHz device */
167 #define PCI_DEVID_BCM43222_D11N2G 0x4351 /* 43222 802.11n 2.4GHz device */
168 #define PCI_DEVID_BCM43222_D11N5G 0x4352 /* 43222 802.11n 5GHz device */
173 #define PCI_DEVID_BCM43236_D11N2G 0x4347 /* 43236 802.11n 2.4GHz device */
174 #define PCI_DEVID_BCM43236_D11N5G 0x4348 /* 43236 802.11n 5GHz device */
175 #define PCI_DEVID_BCM43225_D11N2G 0x4357 /* 43225 802.11n 2.4GHz device */
181 #define PCI_DEVID_BCM4336_D11N 0x4343 /* 4336 802.11n 2.4GHz device */
183 #define PCI_DEVID_BCM6362_D11N2G 0x433f /* 6362 802.11n 2.4Ghz band id */
184 #define PCI_DEVID_BCM6362_D11N5G 0x434f /* 6362 802.11n 5Ghz band id */
186 #define PCI_DEVID_BCM4331_D11N2G 0x4332 /* 4331 802.11n 2.4Ghz band id */
187 #define PCI_DEVID_BCM4331_D11N5G 0x4333 /* 4331 802.11n 5Ghz band id */
189 #define PCI_DEVID_BCM43237_D11N5G 0x4356 /* 43237 802.11n 5GHz device */
190 #define PCI_DEVID_BCM43227_D11N2G 0x4358 /* 43228 802.11n 2.4GHz device */
192 #define PCI_DEVID_BCM43228_D11N5G 0x435a /* 43228 802.11n 5GHz device */
193 #define PCI_DEVID_BCM43362_D11N 0x4363 /* 43362 802.11n 2.4GHz device */
196 #define PCI_DEVID_BCM43217_D11N2G 0x43a9 /* 43217 802.11n 2.4GHz device */
197 #define PCI_DEVID_BCM43131_D11N2G 0x43aa /* 43131 802.11n 2.4GHz device */
381 #define BHND_PKGID_BCM4328SDIOD11G 4 /* 4328 802.11g SDIO package id */
383 #define BHND_PKGID_BCM4329_289PIN 0 /* 4329 289-pin package id */
384 #define BHND_PKGID_BCM4329_182PIN 1 /* 4329N 182-pin package id */
414 #define BHND_PKGID_BCM4314PCIE (8 | 2) /* 4314 QFN PCI (ARM-less) package id */
415 #define BHND_PKGID_BCM4314SDIO_ARM (8 | 3) /* 4314 QFN SDIO (ARM-less) package id */
416 #define BHND_PKGID_BCM4314SDIO_FPBGA (8 | 4) /* 4314 FpBGA SDIO package id */
468 #define BHND_COREID_ARM7S 0x825 /* ARM7tdmi-s core */
471 #define BHND_COREID_SSNPHY 0x828 /* 802.11n single-stream phy core */
474 #define BHND_COREID_HTPHY 0x82b /* 802.11n 4x4 phy core */
488 #define BHND_COREID_APB_BRIDGE 0x135 /* BP135 AMBA AXI-APB bridge */
514 * PrimeCell-compatible BCM4331 cores, but due to lack of documentation, the
524 #define BHND_CHIPTYPE_SIBA 0 /**< siba(4) interconnect */
525 #define BHND_CHIPTYPE_BCMA 1 /**< bcma(4) interconnect */
527 #define BHND_CHIPTYPE_BCMA_ALT 3 /**< bcma(4) interconnect */
529 /** Evaluates to true if @p _type is a BCMA or BCMA-compatible interconenct */
540 #define BHND_BFL_BTC2WIRE 0x00000001 /* old 2wire Bluetooth coexistence, OBSOLETE */
548 #define BHND_BFL_CCKHIPWR 0x00000040 /* Can do high-power CCK transmission */
554 #define BHND_BFL_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */
573 #define BHND_BFL_EXTLNA_5GHZ 0x10000000 /* Board has an external LNA in 5GHz band */
584 #define BHND_BFL2_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */
590 #define BHND_BFL2_BTC3WIRE 0x00000080 /* Board support legacy 3 wire or 4 wire */
591 #define BHND_BFL2_BTCLEGACY 0x00000080 /* Board support legacy 3/4 wire, to replace
595 #define BHND_BFL2_SPUR_WAR 0x00000200 /* Board has a WAR for clock-harmonic spurs */
596 #define BHND_BFL2_GPLL_WAR 0x00000400 /* Flag to narrow G-band PLL loop b/w */
597 #define BHND_BFL2_TRISTATE_LED 0x00000800 /* Tri-state the LED */
599 #define BHND_BFL2_2G_SPUR_WAR 0x00002000 /* WAR to reduce and avoid clock-harmonic spurs in 2G */
602 #define BHND_BFL2_GPLL_WAR2 0x00010000 /* Flag to widen G-band PLL loop b/w */
619 #define BHND_BFL2_BTC3WIREONLY 0x02000000 /* standard 3 wire btc only. 4 wire not supported */
630 /* SROM 11 - 11ac boardflag definitions */
633 #define BHND_BFL_SROM11_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */
634 #define BHND_BFL_SROM11_EXTLNA_5GHZ 0x10000000 /* Board has an external LNA in 5GHz band */
636 #define BHND_BFL2_SROM11_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */
637 #define BHND_BFL2_SROM11_ANAPACTRL_2G 0x00100000 /* 2G ext PAs are ctrl-ed by analog PA ctrl lines …
638 #define BHND_BFL2_SROM11_ANAPACTRL_5G 0x00200000 /* 5G ext PAs are ctrl-ed by analog PA ctrl lines …
663 #define BHND_BFL3_EN_NONBRCM_TXBF 0x10000000 /* acphy, enable non-brcm TXBF */
666 /* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */
667 #define BHND_GPIO_BOARD_BTC3W_IN 0x850 /* bit 4 is RF_ACTIVE, bit 6 is STATUS, bit 11 is PRI */
669 #define BHND_GPIO_BOARD_BTCMOD_IN 0x010 /* bit 4 is the alternate BT Coexistence Input */
670 #define BHND_GPIO_BOARD_BTCMOD_OUT 0x020 /* bit 5 is the alternate BT Coexistence Out */
671 #define BHND_GPIO_BOARD_BTC_IN 0x080 /* bit 7 is BT Coexistence Input */
672 #define BHND_GPIO_BOARD_BTC_OUT 0x100 /* bit 8 is BT Coexistence Out */
684 #define BHND_GPIO_BTC4W_OUT_4312 0x010 /* bit 4 is BT_IODISABLE */
690 #define BHND_GPIO_BTC4W_OUT_4331_SHARED 0x010 /* GPIO 4 */
742 /* 11a-only minipci */