Lines Matching +full:usb2 +full:- +full:phy0
1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Reworked by Matteo Facchinetti (engineering@sirius-es.it)
11 #include <dt-bindings/clock/mpc512x-clock.h>
13 /dts-v1/;
18 #address-cells = <1>;
19 #size-cells = <1>;
20 interrupt-parent = <&ipic>;
29 #address-cells = <1>;
30 #size-cells = <0>;
35 d-cache-line-size = <0x20>; // 32 bytes
36 i-cache-line-size = <0x20>; // 32 bytes
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
39 timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
40 bus-frequency = <198000000>; // 198 MHz csb bus
41 clock-frequency = <396000000>; // 396 MHz ppc core
51 compatible = "fsl,mpc5121-sram";
56 #address-cells = <1>;
57 #size-cells = <0>;
60 compatible = "fixed-clock";
61 #clock-cells = <0>;
62 clock-frequency = <33000000>;
67 compatible = "fsl,mpc5121-immr";
68 #address-cells = <1>;
69 #size-cells = <1>;
72 bus-frequency = <66000000>; // 66 MHz ips bus
78 // sense == 2: Edge, high-to-low change
80 ipic: interrupt-controller@c00 {
81 compatible = "fsl,mpc5121-ipic", "fsl,ipic";
82 interrupt-controller;
83 #address-cells = <0>;
84 #interrupt-cells = <2>;
89 compatible = "fsl,mpc5121-rtc";
95 compatible = "fsl,mpc5125-reset";
100 compatible = "fsl,mpc5121-clock";
102 #clock-cells = <1>;
104 clock-names = "osc";
108 compatible = "fsl,mpc5121-pmc";
114 compatible = "fsl,mpc5125-gpio";
120 compatible = "fsl,mpc5125-gpio";
126 compatible = "fsl,mpc5121-mscan";
134 clock-names = "ipg", "ips", "sys", "ref", "mclk";
138 compatible = "fsl,mpc5121-mscan";
146 clock-names = "ipg", "ips", "sys", "ref", "mclk";
150 compatible = "fsl,mpc5121-sdhc";
155 clock-names = "ipg", "per";
159 #address-cells = <1>;
160 #size-cells = <0>;
161 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
165 clock-names = "ipg";
169 #address-cells = <1>;
170 #size-cells = <0>;
171 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
175 clock-names = "ipg";
179 #address-cells = <1>;
180 #size-cells = <0>;
181 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
185 clock-names = "ipg";
189 compatible = "fsl,mpc5121-i2c-ctrl";
194 compatible = "fsl,mpc5121-diu";
198 clock-names = "ipg";
202 compatible = "fsl,mpc5121-fec-mdio";
204 #address-cells = <1>;
205 #size-cells = <0>;
206 phy0: ethernet-phy@0 {
212 compatible = "fsl,mpc5125-fec";
214 local-mac-address = [ 00 00 00 00 00 00 ];
216 phy-handle = < &phy0 >;
217 phy-connection-type = "rmii";
219 clock-names = "per";
224 compatible = "fsl,mpc5125-ioctl";
231 // before re-enabling it
233 compatible = "fsl,mpc5121-usb2-dr";
235 #address-cells = <1>;
236 #size-cells = <0>;
241 clock-names = "ipg";
246 compatible = "fsl,mpc512x-lpbfifo";
250 dma-names = "rx-tx";
256 compatible = "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
259 fsl,rx-fifo-size = <16>;
260 fsl,tx-fifo-size = <16>;
263 clock-names = "ipg", "mclk";
268 compatible = "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
271 fsl,rx-fifo-size = <16>;
272 fsl,tx-fifo-size = <16>;
275 clock-names = "ipg", "mclk";
279 compatible = "fsl,mpc5121-psc-fifo";
283 clock-names = "ipg";
287 compatible = "fsl,mpc5121-dma"; // BSP name: "mpc512x-dma2"
290 #dma-cells = <1>;