Lines Matching +full:imx7ulp +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0+
6 /delete-node/ &enet1_lpcg;
7 /delete-node/ &fec2;
10 conn_enet0_root_clk: clock-conn-enet0-root {
11 compatible = "fixed-clock";
12 #clock-cells = <0>;
13 clock-frequency = <250000000>;
14 clock-output-names = "conn_enet0_root_clk";
17 clk_dummy: clock-dummy {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
20 clock-frequency = <0>;
21 clock-output-names = "clk_dummy";
27 compatible = "nxp,imx8dxl-dwmac-eqos", "snps,dwmac-5.10a";
29 interrupt-parent = <&gic>;
32 interrupt-names = "macirq", "eth_wake_irq";
38 clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";
39 assigned-clocks = <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>;
40 assigned-clock-rates = <125000000>;
41 power-domains = <&pd IMX_SC_R_ENET_1>;
46 compatible = "fsl,imx8dxl-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb";
48 interrupt-parent = <&gic>;
54 * scu firmware disables the access to the clock and keeps
58 ahb-burst-config = <0x0>;
59 tx-burst-size-dword = <0x10>;
60 rx-burst-size-dword = <0x10>;
61 power-domains = <&pd IMX_SC_R_USB_1>;
66 #index-cells = <1>;
67 compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
72 compatible = "fsl,imx8dxl-usbphy", "fsl,imx7ulp-usbphy";
75 power-domains = <&pd IMX_SC_R_USB_1_PHY>;
79 eqos_lpcg: clock-controller@5b240000 {
80 compatible = "fsl,imx8qxp-lpcg";
82 #clock-cells = <1>;
88 clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_2>,
91 clock-output-names = "eqos_ptp",
96 power-domains = <&pd IMX_SC_R_ENET_1>;
99 usb2_2_lpcg: clock-controller@5b280000 {
100 compatible = "fsl,imx8qxp-lpcg";
102 #clock-cells = <1>;
103 clock-indices = <IMX_LPCG_CLK_7>;
105 clock-output-names = "usboh3_2_phy_ipg_clk";
106 power-domains = <&pd IMX_SC_R_USB_1_PHY>;
121 compatible = "fsl,imx8dxl-fec", "fsl,imx8qm-fec", "fsl,imx6sx-fec";
126 assigned-clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_C_CLKDIV>;
127 assigned-clock-rates = <125000000>;
131 compatible = "fsl,imx8dxl-usdhc", "fsl,imx8qxp-usdhc";
136 compatible = "fsl,imx8dxl-usdhc", "fsl,imx8qxp-usdhc";
141 compatible = "fsl,imx8dxl-usdhc", "fsl,imx8qxp-usdhc";
148 * usbotg1 and usbotg2 share one clock
149 * scfw disable clock access and keep it always on