Lines Matching +full:msm8998 +full:- +full:mdss
1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dpu-msm8998.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU dt properties for MSM8998 target
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS and DPU are mentioned for MSM8998 target.
20 - const: qcom,msm8998-mdss
25 reg-names:
26 const: mdss
28 power-domains:
33 - description: Display AHB clock
34 - description: Display AXI clock
35 - description: Display core clock
37 clock-names:
39 - const: iface
40 - const: bus
41 - const: core
46 interrupt-controller: true
48 "#address-cells": true
50 "#size-cells": true
52 "#interrupt-cells":
57 - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
62 "^display-controller@[0-9a-f]+$":
70 - const: qcom,msm8998-dpu
74 - description: Address offset and size for mdp register set
75 - description: Address offset and size for regdma register set
76 - description: Address offset and size for vbif register set
77 - description: Address offset and size for non-realtime vbif register set
79 reg-names:
81 - const: mdp
82 - const: regdma
83 - const: vbif
84 - const: vbif_nrt
88 - description: Display ahb clock
89 - description: Display axi clock
90 - description: Display mem-noc clock
91 - description: Display core clock
92 - description: Display vsync clock
94 clock-names:
96 - const: iface
97 - const: bus
98 - const: mnoc
99 - const: core
100 - const: vsync
105 power-domains:
108 operating-points-v2: true
109 opp-table:
130 - port@0
131 - port@1
134 - compatible
135 - reg
136 - reg-names
137 - clocks
138 - interrupts
139 - power-domains
140 - operating-points-v2
141 - ports
144 - compatible
145 - reg
146 - reg-names
147 - power-domains
148 - clocks
149 - interrupts
150 - interrupt-controller
151 - iommus
152 - ranges
157 - |
158 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
159 #include <dt-bindings/interrupt-controller/arm-gic.h>
160 #include <dt-bindings/power/qcom-rpmpd.h>
162 mdss: display-subsystem@c900000 {
163 compatible = "qcom,msm8998-mdss";
165 reg-names = "mdss";
170 clock-names = "iface", "bus", "core";
172 #address-cells = <1>;
173 #interrupt-cells = <1>;
174 #size-cells = <1>;
177 interrupt-controller;
180 power-domains = <&mmcc MDSS_GDSC>;
183 display-controller@c901000 {
184 compatible = "qcom,msm8998-dpu";
189 reg-names = "mdp", "regdma", "vbif", "vbif_nrt";
196 clock-names = "iface", "bus", "mnoc", "core", "vsync";
198 interrupt-parent = <&mdss>;
200 operating-points-v2 = <&mdp_opp_table>;
201 power-domains = <&rpmpd MSM8998_VDDMX>;
204 #address-cells = <1>;
205 #size-cells = <0>;
210 remote-endpoint = <&dsi0_in>;
217 remote-endpoint = <&dsi1_in>;