Lines Matching +full:imx8mq +full:- +full:clock
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs
10 - Guido Gúnther <agx@sigxcpu.org>
11 - Robert Chiras <robert.chiras@nxp.com>
14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
15 the SOCs NWL MIPI-DSI host controller.
18 - $ref: ../dsi-controller.yaml#
22 const: fsl,imx8mq-nwl-dsi
30 '#address-cells':
33 '#size-cells':
36 assigned-clock-parents: true
37 assigned-clock-rates: true
38 assigned-clocks: true
42 - description: DSI core clock
43 - description: RX_ESC clock (used in escape mode)
44 - description: TX_ESC clock (used in escape mode)
45 - description: PHY_REF clock
46 - description: LCDIF clock
48 clock-names:
50 - const: core
51 - const: rx_esc
52 - const: tx_esc
53 - const: phy_ref
54 - const: lcdif
56 mux-controls:
65 phy-names:
67 - const: dphy
69 power-domains:
74 - description: dsi byte reset line
75 - description: dsi dpi reset line
76 - description: dsi esc reset line
77 - description: dsi pclk reset line
79 reset-names:
81 - const: byte
82 - const: dpi
83 - const: esc
84 - const: pclk
91 $ref: /schemas/graph.yaml#/$defs/port-base
99 description: sub-node describing the input from LCDIF
103 description: sub-node describing the input from DCSS
106 - required:
107 - endpoint@0
108 - required:
109 - endpoint@1
120 - port@0
121 - port@1
124 - '#address-cells'
125 - '#size-cells'
126 - clock-names
127 - clocks
128 - compatible
129 - interrupts
130 - mux-controls
131 - phy-names
132 - phys
133 - ports
134 - reg
135 - reset-names
136 - resets
141 - |
142 #include <dt-bindings/clock/imx8mq-clock.h>
143 #include <dt-bindings/gpio/gpio.h>
144 #include <dt-bindings/interrupt-controller/arm-gic.h>
145 #include <dt-bindings/reset/imx8mq-reset.h>
148 #address-cells = <1>;
149 #size-cells = <0>;
150 compatible = "fsl,imx8mq-nwl-dsi";
157 clock-names = "core", "rx_esc", "tx_esc", "phy_ref", "lcdif";
159 mux-controls = <&mux 0>;
160 power-domains = <&pgc_mipi>;
165 reset-names = "byte", "dpi", "esc", "pclk";
167 phy-names = "dphy";
172 vcc-supply = <®_2v8_p>;
173 iovcc-supply = <®_1v8_p>;
174 reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
177 remote-endpoint = <&mipi_dsi_out>;
183 #address-cells = <1>;
184 #size-cells = <0>;
187 #size-cells = <0>;
188 #address-cells = <1>;
192 remote-endpoint = <&lcdif_mipi_dsi>;
198 remote-endpoint = <&panel_in>;