Lines Matching +full:isa +full:- +full:extensions

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58 .TH OPENSSL_IA32CAP 3ossl 2025-09-30 3.5.4 OpenSSL
64 OPENSSL_ia32cap \- the x86[_64] processor capabilities vector
72 OpenSSL supports a range of x86[_64] instruction set extensions and
73 features. These extensions are denoted by individual bits or groups of bits
74 stored internally as ten 32\-bit capability vectors and for simplicity
75 represented logically below as five 64\-bit vectors. This logical
87 Instruction Set Extensions Programming Reference, and the AMD64 Architecture
94 .IP "bit #0+4 denoting presence of Time-Stamp Counter;" 4
95 .IX Item "bit #0+4 denoting presence of Time-Stamp Counter;"
117 .IP "bit #0+43 denoting AMD XOP support (forced to zero on non-AMD CPUs);" 4
118 .IX Item "bit #0+43 denoting AMD XOP support (forced to zero on non-AMD CPUs);"
121 .IP "bit #0+57 denoting AES-NI instruction set extension;" 4
122 .IX Item "bit #0+57 denoting AES-NI instruction set extension;"
181 .IP "bit #128+55 denoting availability of AVX-IFMA extension;" 4
182 .IX Item "bit #128+55 denoting availability of AVX-IFMA extension;"
189 .IP "bit #192+19 denoting availability of AVX10 Converged Vector ISA extension;" 4
190 .IX Item "bit #192+19 denoting availability of AVX10 Converged Vector ISA extension;"
200 .IP "bits #256+32+[0:7] denoting AVX10 Converged Vector ISA Version (8 bits);" 4
201 .IX Item "bits #256+32+[0:7] denoting AVX10 Converged Vector ISA Version (8 bits);"
214 The variable consists of a series of 64\-bit numbers representing each
220 Used in this form, each non-null logical vector will *overwrite* the entire corresponding
226 (disable all post-AVX extensions):
237 A more likely usage scenario would be to disable specific instruction set extensions.
238 The '\fB~\fR' character is used to specify a bit mask of the extensions to be disabled for
241 To illustrate, the following will disable AVX2 code paths and further extensions:
246 extensions and therefore any code paths using those extensions but leave
256 the decision on whether or not expensive countermeasures against cache-timing attacks
263 Copyright 2004\-2021 The OpenSSL Project Authors. All Rights Reserved.