Lines Matching refs:isOrdered

211 class VLXSched<int dataEEW, bit isOrdered, string dataEMUL, string idxEMUL,
213   [!cast<SchedWrite>("WriteVLD" # !if(isOrdered, "O", "U") # "X" # dataEEW # "_" # dataEMUL)],
214   [ReadVLDX, !cast<SchedRead>("ReadVLD" # !if(isOrdered, "O", "U") # "XV_" # idxEMUL)],
217 class VLXSchedMC<int dataEEW, bit isOrdered>:
218   VLXSched<dataEEW, isOrdered, "WorstCase", "WorstCase", forceMasked=1>;
220 class VSXSched<int dataEEW, bit isOrdered, string dataEMUL, string idxEMUL,
222   [!cast<SchedWrite>("WriteVST" # !if(isOrdered, "O", "U") # "X" # dataEEW # "_" # dataEMUL)],
223   [!cast<SchedRead>("ReadVST" # !if(isOrdered, "O", "U") #"X" # dataEEW # "_" # dataEMUL),
224    ReadVSTX, !cast<SchedRead>("ReadVST" # !if(isOrdered, "O", "U") # "XV_" # idxEMUL)],
227 class VSXSchedMC<int dataEEW, bit isOrdered>:
228   VSXSched<dataEEW, isOrdered, "WorstCase", "WorstCase", forceMasked=1>;
276 class VLXSEGSched<int nf, int eew, bit isOrdered, string emul,
278   [!cast<SchedWrite>("WriteVL" #!if(isOrdered, "O", "U") #"XSEG" #nf #"e" #eew #"_" #emul)],
279   [ReadVLDX, !cast<SchedRead>("ReadVLD" #!if(isOrdered, "O", "U") #"XV_" #emul)],
282 class VLXSEGSchedMC<int nf, int eew, bit isOrdered>:
283   VLXSEGSched<nf, eew, isOrdered, "WorstCase", forceMasked=1>;
286 class VSXSEGSched<int nf, int eew, bit isOrdered, string emul,
288   [!cast<SchedWrite>("WriteVS" #!if(isOrdered, "O", "U") #"XSEG" #nf #"e" #eew #"_" #emul)],
289   [!cast<SchedRead>("ReadVST" #!if(isOrdered, "O", "U") #"X" #eew #"_" #emul),
290    ReadVSTX, !cast<SchedRead>("ReadVST" #!if(isOrdered, "O", "U") #"XV_" #emul)],
293 class VSXSEGSchedMC<int nf, int eew, bit isOrdered>:
294   VSXSEGSched<nf, eew, isOrdered, "WorstCase", forceMasked=1>;
546     VLXSchedMC<eew, isOrdered=0>;
549     VLXSchedMC<eew, isOrdered=1>;
553     VSXSchedMC<eew, isOrdered=0>;
556     VSXSchedMC<eew, isOrdered=1>;
1734         VLXSEGSchedMC<nf, eew, isOrdered=0>;
1738         VLXSEGSchedMC<nf, eew, isOrdered=1>;
1742         VSXSEGSchedMC<nf, eew, isOrdered=0>;
1746         VSXSEGSchedMC<nf, eew, isOrdered=1>;
1779           VLXSEGSchedMC<nf, 64, isOrdered=0>;
1783           VLXSEGSchedMC<nf, 64, isOrdered=1>;
1787           VSXSEGSchedMC<nf, 64, isOrdered=0>;
1791           VSXSEGSchedMC<nf, 64, isOrdered=1>;