Lines Matching +full:5 +full:b110000

60 def simm5 : RISCVSImmLeafOp<5> {
64       return isInt<5>(Imm);
76   [{return (isInt<5>(Imm) && Imm != -16) || Imm == 16;}]> {
82       return (isInt<5>(Imm) && Imm != -16) || Imm == 16;
88   [{return Imm != 0 && ((isInt<5>(Imm) && Imm != -16) || Imm == 16);}]>;
530 class VALUVs2<bits<6> funct6, bits<5> vs1, RISCVVFormat opv, string opcodestr>
618 multiclass VALU_MV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
723 multiclass VSQR_FV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
728 multiclass VRCP_FV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
758 multiclass VCLS_FV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
763 multiclass VCVTF_IV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
768 multiclass VCVTI_FV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
773 multiclass VWCVTF_IV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
778 multiclass VWCVTI_FV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
783 multiclass VWCVTF_FV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
788 multiclass VNCVTF_IV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
793 multiclass VNCVTI_FV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
798 multiclass VNCVTF_FV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
849 multiclass VMSFS_MV_V<string opcodestr, bits<6> funct6, bits<5> vs1> {
854 multiclass VIOTA_MV_V<string opcodestr, bits<6> funct6, bits<5> vs1> {
1109 defm VWADDU_V : VALU_MV_V_X<"vwaddu", 0b110000, "v">;
1347 defm VFWADD_V : VWALU_FV_V_F<"vfwadd", 0b110000, "v">;
1523 defm VWREDSUMU : VWRED_IV_V<"vwredsumu", 0b110000>;