Lines Matching +full:supervisor +full:- +full:level
1 //===-- RISCVFeatures.td - RISC-V Features and Extensions --*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
10 // RISC-V subtarget features and instruction predicates.
11 //===----------------------------------------------------------------------===//
13 // Subclass of SubtargetFeature to be used when the feature is also a RISC-V
16 // name - Name of the extension in lower case.
17 // major - Major version of extension.
18 // minor - Minor version of extension.
19 // desc - Description of extension.
20 // implies - Extensions or features implied by this extension.
21 // fieldname - name of field to create in RISCVSubtarget. By default replaces
23 // value - Value to assign to the field in RISCVSubtarget when this
30 // MajorVersion - The major version for this extension.
33 // MinorVersion - The minor version for this extension.
36 // Experimental - Does extension require -menable-experimental-extensions.
42 // groupID - groupID of extension
43 // bitPos - bit position of extension bitmask
50 // sets the Experimental flag and prepends experimental- to the -mattr name.
55 : RISCVExtension<"experimental-"#name, major, minor, desc, implies,
77 "'Zicbom' (Cache-Block Management Instructions)">;
78 def HasStdExtZicbom : Predicate<"Subtarget->hasStdExtZicbom()">,
80 "'Zicbom' (Cache-Block Management Instructions)">;
84 "'Zicbop' (Cache-Block Prefetch Instructions)">;
85 def HasStdExtZicbop : Predicate<"Subtarget->hasStdExtZicbop()">,
87 "'Zicbop' (Cache-Block Prefetch Instructions)">;
91 "'Zicboz' (Cache-Block Zero Instructions)">,
93 def HasStdExtZicboz : Predicate<"Subtarget->hasStdExtZicboz()">,
95 "'Zicboz' (Cache-Block Zero Instructions)">;
116 def HasStdExtZicsr : Predicate<"Subtarget->hasStdExtZicsr()">,
129 def HasStdExtZicond : Predicate<"Subtarget->hasStdExtZicond()">,
136 def HasStdExtZifencei : Predicate<"Subtarget->hasStdExtZifencei()">,
144 def HasStdExtZihintpause : Predicate<"Subtarget->hasStdExtZihintpause()">,
150 "'Zihintntl' (Non-Temporal Locality Hints)">,
152 def HasStdExtZihintntl : Predicate<"Subtarget->hasStdExtZihintntl()">,
154 "'Zihintntl' (Non-Temporal Locality Hints)">;
162 "'Zimop' (May-Be-Operations)">;
163 def HasStdExtZimop : Predicate<"Subtarget->hasStdExtZimop()">,
165 "'Zimop' (May-Be-Operations)">;
171 def HasStdExtZicfilp : Predicate<"Subtarget->hasStdExtZicfilp()">,
174 def NoStdExtZicfilp : Predicate<"!Subtarget->hasStdExtZicfilp()">,
181 def HasStdExtZicfiss : Predicate<"Subtarget->hasStdExtZicfiss()">,
184 def NoHasStdExtZicfiss : Predicate<"!Subtarget->hasStdExtZicfiss()">;
191 def HasStdExtZmmul : Predicate<"Subtarget->hasStdExtZmmul()">,
200 def HasStdExtM : Predicate<"Subtarget->hasStdExtM()">,
210 def HasStdExtA : Predicate<"Subtarget->hasStdExtA()">,
216 "'Ztso' (Memory Model - Total Store Order)">,
218 def HasStdExtZtso : Predicate<"Subtarget->hasStdExtZtso()">,
220 "'Ztso' (Memory Model - Total Store Order)">;
221 def NotHasStdExtZtso : Predicate<"!Subtarget->hasStdExtZtso()">;
233 : Predicate<"Subtarget->hasStdExtA() || Subtarget->hasStdExtZaamo()">,
241 def HasStdExtZabha : Predicate<"Subtarget->hasStdExtZabha()">,
247 "'Zacas' (Atomic Compare-And-Swap Instructions)">,
249 def HasStdExtZacas : Predicate<"Subtarget->hasStdExtZacas()">,
251 "'Zacas' (Atomic Compare-And-Swap Instructions)">;
252 def NoStdExtZacas : Predicate<"!Subtarget->hasStdExtZacas()">;
256 "'Zalasr' (Load-Acquire and Store-Release Instructions)">;
257 def HasStdExtZalasr : Predicate<"Subtarget->hasStdExtZalasr()">,
259 "'Zalasr' (Load-Acquire and Store-Release Instructions)">;
263 "'Zalrsc' (Load-Reserved/Store-Conditional)">;
265 : Predicate<"Subtarget->hasStdExtA() || Subtarget->hasStdExtZalrsc()">,
268 "'Zalrsc' (Load-Reserved/Store-Conditional)">;
272 "'Zama16b' (Atomic 16-byte misaligned loads, stores and AMOs)">;
276 def HasStdExtZawrs : Predicate<"Subtarget->hasStdExtZawrs()">,
284 "'F' (Single-Precision Floating-Point)",
287 def HasStdExtF : Predicate<"Subtarget->hasStdExtF()">,
289 "'F' (Single-Precision Floating-Point)">;
293 "'D' (Double-Precision Floating-Point)",
296 def HasStdExtD : Predicate<"Subtarget->hasStdExtD()">,
298 "'D' (Double-Precision Floating-Point)">;
302 "'Zfhmin' (Half-Precision Floating-Point Minimal)",
305 def HasStdExtZfhmin : Predicate<"Subtarget->hasStdExtZfhmin()">,
307 "'Zfh' (Half-Precision Floating-Point) or "
308 "'Zfhmin' (Half-Precision Floating-Point Minimal)">;
312 "'Zfh' (Half-Precision Floating-Point)",
315 def HasStdExtZfh : Predicate<"Subtarget->hasStdExtZfh()">,
317 "'Zfh' (Half-Precision Floating-Point)">;
318 def NoStdExtZfh : Predicate<"!Subtarget->hasStdExtZfh()">;
323 def HasStdExtZfbfmin : Predicate<"Subtarget->hasStdExtZfbfmin()">,
328 : Predicate<"Subtarget->hasHalfFPLoadStoreMove()">,
331 "'Zfh' (Half-Precision Floating-Point) or "
332 "'Zfhmin' (Half-Precision Floating-Point Minimal) or "
337 "'Zfa' (Additional Floating-Point)",
340 def HasStdExtZfa : Predicate<"Subtarget->hasStdExtZfa()">,
342 "'Zfa' (Additional Floating-Point)">;
348 def HasStdExtZfinx : Predicate<"Subtarget->hasStdExtZfinx()">,
356 def HasStdExtZdinx : Predicate<"Subtarget->hasStdExtZdinx()">,
364 def HasStdExtZhinxmin : Predicate<"Subtarget->hasStdExtZhinxmin()">,
373 def HasStdExtZhinx : Predicate<"Subtarget->hasStdExtZhinx()">,
376 def NoStdExtZhinx : Predicate<"!Subtarget->hasStdExtZhinx()">;
384 def HasStdExtC : Predicate<"Subtarget->hasStdExtC()">,
389 : SubtargetFeature<"no-rvc-hints", "EnableRVCHintInstrs", "false",
391 def HasRVCHints : Predicate<"Subtarget->enableRVCHintInstrs()">,
401 : Predicate<"Subtarget->hasStdExtCOrZca()">,
411 def HasStdExtZcb : Predicate<"Subtarget->hasStdExtZcb()">,
417 "'Zcd' (Compressed Double-Precision Floating-Point Instructions)",
421 : Predicate<"Subtarget->hasStdExtCOrZcd()">,
424 "'Zcd' (Compressed Double-Precision Floating-Point Instructions)">;
428 "'Zcf' (Compressed Single-Precision Floating-Point Instructions)",
433 "'Zcmp' (sequenced instructions for code-size reduction)",
435 def HasStdExtZcmp : Predicate<"Subtarget->hasStdExtZcmp() && !Subtarget->hasStdExtC()">,
437 "'Zcmp' (sequenced instructions for code-size reduction)">;
441 "'Zcmt' (table jump instructions for code-size reduction)",
443 def HasStdExtZcmt : Predicate<"Subtarget->hasStdExtZcmt()">,
445 "'Zcmt' (table jump instructions for code-size reduction)">;
453 : Predicate<"Subtarget->hasStdExtC() || Subtarget->hasStdExtZcf() "
454 "Subtarget->hasStdExtZce()">,
458 "'Zcf' (Compressed Single-Precision Floating-Point Instructions)">;
462 "'Zcmop' (Compressed May-Be-Operations)",
464 def HasStdExtZcmop : Predicate<"Subtarget->hasStdExtZcmop()">,
466 "'Zcmop' (Compressed May-Be-Operations)">;
474 def HasStdExtZba : Predicate<"Subtarget->hasStdExtZba()">,
477 def NotHasStdExtZba : Predicate<"!Subtarget->hasStdExtZba()">;
481 "'Zbb' (Basic Bit-Manipulation)">,
483 def HasStdExtZbb : Predicate<"Subtarget->hasStdExtZbb()">,
485 "'Zbb' (Basic Bit-Manipulation)">;
486 def NoStdExtZbb : Predicate<"!Subtarget->hasStdExtZbb()">,
491 "'Zbc' (Carry-Less Multiplication)">,
493 def HasStdExtZbc : Predicate<"Subtarget->hasStdExtZbc()">,
495 "'Zbc' (Carry-Less Multiplication)">;
499 "'Zbs' (Single-Bit Instructions)">,
501 def HasStdExtZbs : Predicate<"Subtarget->hasStdExtZbs()">,
503 "'Zbs' (Single-Bit Instructions)">;
511 def HasStdExtB : Predicate<"Subtarget->hasStdExtB()">,
519 def HasStdExtZbkb : Predicate<"Subtarget->hasStdExtZbkb()">,
527 def HasStdExtZbkx : Predicate<"Subtarget->hasStdExtZbkx()">,
532 : Predicate<"Subtarget->hasStdExtZbb() || Subtarget->hasStdExtZbkb()">,
534 "'Zbb' (Basic Bit-Manipulation) or "
537 // The Carry-less multiply subextension for cryptography is a subset of basic
538 // carry-less multiply subextension. The former should be enabled if the latter
542 "'Zbkc' (Carry-less multiply instructions for "
546 : Predicate<"Subtarget->hasStdExtZbkc()">,
548 "'Zbkc' (Carry-less multiply instructions for Cryptography)">;
551 : Predicate<"Subtarget->hasStdExtZbc() || Subtarget->hasStdExtZbkc()">,
553 "'Zbc' (Carry-Less Multiplication) or "
554 "'Zbkc' (Carry-less multiply instructions "
563 def HasStdExtZknd : Predicate<"Subtarget->hasStdExtZknd()">,
571 def HasStdExtZkne : Predicate<"Subtarget->hasStdExtZkne()">,
578 : Predicate<"Subtarget->hasStdExtZknd() || Subtarget->hasStdExtZkne()">,
587 def HasStdExtZknh : Predicate<"Subtarget->hasStdExtZknh()">,
595 def HasStdExtZksed : Predicate<"Subtarget->hasStdExtZksed()">,
603 def HasStdExtZksh : Predicate<"Subtarget->hasStdExtZksh()">,
610 def HasStdExtZkr : Predicate<"Subtarget->hasStdExtZkr()">,
651 foreach i = { 6-16 } in {
700 def HasStdExtZvfbfmin : Predicate<"Subtarget->hasStdExtZvfbfmin()">,
706 "'Zvfbfwma' (Vector BF16 widening mul-add)",
708 def HasStdExtZvfbfwma : Predicate<"Subtarget->hasStdExtZvfbfwma()">,
710 "'Zvfbfwma' (Vector BF16 widening mul-add)">;
714 "'Zvfhmin' (Vector Half-Precision Floating-Point Minimal)",
720 "'Zvfh' (Vector Half-Precision Floating-Point)",
725 : Predicate<"Subtarget->hasStdExtZfh() || Subtarget->hasStdExtZvfh()">,
727 "'Zfh' (Half-Precision Floating-Point) or "
728 "'Zvfh' (Vector Half-Precision Floating-Point)">;
734 "'Zvkb' (Vector Bit-manipulation used in Cryptography)">,
736 def HasStdExtZvkb : Predicate<"Subtarget->hasStdExtZvkb()">,
738 "'Zvkb' (Vector Bit-manipulation used in Cryptography)">;
742 "'Zvbb' (Vector basic bit-manipulation instructions)",
745 def HasStdExtZvbb : Predicate<"Subtarget->hasStdExtZvbb()">,
747 "'Zvbb' (Vector basic bit-manipulation instructions)">;
753 def HasStdExtZvbc : Predicate<"Subtarget->hasStdExtZvbc()">,
761 def HasStdExtZvkg : Predicate<"Subtarget->hasStdExtZvkg()">,
769 def HasStdExtZvkned : Predicate<"Subtarget->hasStdExtZvkned()">,
775 "'Zvknha' (Vector SHA-2 (SHA-256 only))">,
777 def HasStdExtZvknha : Predicate<"Subtarget->hasStdExtZvknha()">,
779 "'Zvknha' (Vector SHA-2 (SHA-256 only))">;
783 "'Zvknhb' (Vector SHA-2 (SHA-256 and SHA-512))",
786 def HasStdExtZvknhb : Predicate<"Subtarget->hasStdExtZvknhb()">,
788 "'Zvknhb' (Vector SHA-2 (SHA-256 and SHA-512))">;
790 def HasStdExtZvknhaOrZvknhb : Predicate<"Subtarget->hasStdExtZvknha() || Subtarget->hasStdExtZvknhb…
792 "'Zvknha' or 'Zvknhb' (Vector SHA-2)">;
798 def HasStdExtZvksed : Predicate<"Subtarget->hasStdExtZvksed()">,
806 def HasStdExtZvksh : Predicate<"Subtarget->hasStdExtZvksh()">,
812 "'Zvkt' (Vector Data-Independent Execution Latency)">,
815 // Zvk short-hand extensions
852 def HasVInstructions : Predicate<"Subtarget->hasVInstructions()">,
857 def HasVInstructionsI64 : Predicate<"Subtarget->hasVInstructionsI64()">,
862 def HasVInstructionsAnyF : Predicate<"Subtarget->hasVInstructionsAnyF()">,
868 def HasVInstructionsF16Minimal : Predicate<"Subtarget->hasVInstructionsF16Minimal()">,
870 "'Zvfhmin' (Vector Half-Precision Floating-Point Minimal) or "
871 "'Zvfh' (Vector Half-Precision Floating-Point)">;
873 def HasVInstructionsBF16 : Predicate<"Subtarget->hasVInstructionsBF16()">;
874 def HasVInstructionsF16 : Predicate<"Subtarget->hasVInstructionsF16()">;
875 def HasVInstructionsF64 : Predicate<"Subtarget->hasVInstructionsF64()">;
877 def HasVInstructionsFullMultiply : Predicate<"Subtarget->hasVInstructionsFullMultiply()">;
885 def HasStdExtH : Predicate<"Subtarget->hasStdExtH()">,
889 // Supervisor extensions
900 "'Smaia' (Advanced Interrupt Architecture Machine Level)">;
903 "'Ssaia' (Advanced Interrupt Architecture Supervisor "
904 "Level)">;
908 "'Smcsrind' (Indirect CSR Access Machine Level)">;
911 "'Sscsrind' (Indirect CSR Access Supervisor Level)">;
919 "'Smcdeleg' (Counter Delegation Machine Level)">;
922 "'Ssccfg' (Counter Configuration Supervisor Level)">;
930 "'Sscofpmf' (Count Overflow and Mode-Based Filtering)">;
935 "bit for any hpmcounter that is not read-only zero)">;
939 "bit for any hpmcounter that is not read-only zero)">;
943 "'Smstateen' (Machine-mode view of the state-enable extension)">;
946 "'Ssstateen' (Supervisor-mode view of the state-enable extension)">;
950 "'Ssstrict' (No non-conforming extensions are present)">;
954 "'Sstc' (Supervisor-mode timer interrupts)">;
958 "'Ssqosid' (Quality-of-Service (QoS) Identifiers)">;
995 "'Svinval' (Fine-Grained Address-Translation Cache Invalidation)">;
996 def HasStdExtSvinval : Predicate<"Subtarget->hasStdExtSvinval()">,
998 "'Svinval' (Fine-Grained Address-Translation Cache Invalidation)">;
1006 "'Svpbmt' (Page-Based Memory Types)">;
1010 // A supervisor-level extension that provides pointer masking for the next lower
1011 // privilege mode (U-mode), and for VS- and VU-modes if the H extension is
1015 … "'Ssnpm' (Supervisor-level Pointer Masking for next lower privilege mode)">;
1017 // A machine-level extension that provides pointer masking for the next lower
1018 // privilege mode (S/HS if S-mode is implemented, or U-mode otherwise).
1021 … "'Smnpm' (Machine-level Pointer Masking for next lower privilege mode)">;
1023 // A machine-level extension that provides pointer masking for M-mode.
1026 "'Smmpm' (Machine-level Pointer Masking for M-mode)">;
1028 // An extension that indicates that there is pointer-masking support available
1029 // in supervisor mode, with some facility provided in the supervisor execution
1033 "'Sspm' (Indicates Supervisor-mode Pointer Masking)">;
1035 // An extension that indicates that there is pointer-masking support available
1040 "'Supm' (Indicates User-mode Pointer Masking)">;
1042 //===----------------------------------------------------------------------===//
1044 //===----------------------------------------------------------------------===//
1051 def HasVendorXVentanaCondOps : Predicate<"Subtarget->hasVendorXVentanaCondOps()">,
1055 // T-Head Extensions
1059 "'XTHeadBa' (T-Head address calculation instructions)">;
1060 def HasVendorXTHeadBa : Predicate<"Subtarget->hasVendorXTHeadBa()">,
1062 "'XTHeadBa' (T-Head address calculation instructions)">;
1066 "'XTHeadBb' (T-Head basic bit-manipulation instructions)">;
1067 def HasVendorXTHeadBb : Predicate<"Subtarget->hasVendorXTHeadBb()">,
1069 "'XTHeadBb' (T-Head basic bit-manipulation instructions)">;
1073 "'XTHeadBs' (T-Head single-bit instructions)">;
1074 def HasVendorXTHeadBs : Predicate<"Subtarget->hasVendorXTHeadBs()">,
1076 "'XTHeadBs' (T-Head single-bit instructions)">;
1080 "'XTHeadCondMov' (T-Head conditional move instructions)">;
1081 def HasVendorXTHeadCondMov : Predicate<"Subtarget->hasVendorXTHeadCondMov()">,
1083 "'XTHeadCondMov' (T-Head conditional move instructions)">;
1087 "'XTHeadCmo' (T-Head cache management instructions)">;
1088 def HasVendorXTHeadCmo : Predicate<"Subtarget->hasVendorXTHeadCmo()">,
1090 "'XTHeadCmo' (T-Head cache management instructions)">;
1094 "'XTHeadFMemIdx' (T-Head FP Indexed Memory Operations)">;
1095 def HasVendorXTHeadFMemIdx : Predicate<"Subtarget->hasVendorXTHeadFMemIdx()">,
1097 "'XTHeadFMemIdx' (T-Head FP Indexed Memory Operations)">;
1101 "'XTHeadMac' (T-Head Multiply-Accumulate Instructions)">;
1102 def HasVendorXTHeadMac : Predicate<"Subtarget->hasVendorXTHeadMac()">,
1104 "'XTHeadMac' (T-Head Multiply-Accumulate Instructions)">;
1108 "'XTHeadMemIdx' (T-Head Indexed Memory Operations)">;
1109 def HasVendorXTHeadMemIdx : Predicate<"Subtarget->hasVendorXTHeadMemIdx()">,
1111 "'XTHeadMemIdx' (T-Head Indexed Memory Operations)">;
1115 "'XTHeadMemPair' (T-Head two-GPR Memory Operations)">;
1116 def HasVendorXTHeadMemPair : Predicate<"Subtarget->hasVendorXTHeadMemPair()">,
1118 "'XTHeadMemPair' (T-Head two-GPR Memory Operations)">;
1122 "'XTHeadSync' (T-Head multicore synchronization instructions)">;
1123 def HasVendorXTHeadSync : Predicate<"Subtarget->hasVendorXTHeadSync()">,
1125 "'XTHeadSync' (T-Head multicore synchronization instructions)">;
1129 "'XTHeadVdot' (T-Head Vector Extensions for Dot)",
1131 def HasVendorXTHeadVdot : Predicate<"Subtarget->hasVendorXTHeadVdot()">,
1133 "'XTHeadVdot' (T-Head Vector Extensions for Dot)">;
1141 def HasVendorXSfvcp : Predicate<"Subtarget->hasVendorXSfvcp()">,
1147 … "'XSfvqmaccdod' (SiFive Int8 Matrix Multiplication Instructions (2-by-8 and 8-by-2))",
1150 : Predicate<"Subtarget->hasVendorXSfvqmaccdod()">,
1152 … "'XSfvqmaccdod' (SiFive Int8 Matrix Multiplication Instructions (2-by-8 and 8-by-2))">;
1156 … "'XSfvqmaccqoq' (SiFive Int8 Matrix Multiplication Instructions (4-by-8 and 8-by-4))",
1159 : Predicate<"Subtarget->hasVendorXSfvqmaccqoq()">,
1161 … "'XSfvqmaccqoq' (SiFive Int8 Matrix Multiplication Instructions (4-by-8 and 8-by-4))">;
1165 "'XSfvfwmaccqqq' (SiFive Matrix Multiply Accumulate Instruction and 4-by-4))",
1168 : Predicate<"Subtarget->hasVendorXSfvfwmaccqqq()">,
1170 … "'XSfvfwmaccqqq' (SiFive Matrix Multiply Accumulate Instruction and 4-by-4))">;
1174 "'XSfvfnrclipxfqf' (SiFive FP32-to-int8 Ranged Clip Instructions)",
1177 : Predicate<"Subtarget->hasVendorXSfvfnrclipxfqf()">,
1179 "'XSfvfnrclipxfqf' (SiFive FP32-to-int8 Ranged Clip Instructions)">;
1185 : Predicate<"Subtarget->hasVendorXSiFivecdiscarddlone()">,
1193 : Predicate<"Subtarget->hasVendorXSiFivecflushdlone()">,
1201 : Predicate<"Subtarget->hasVendorXSfcease()">,
1205 // Core-V Extensions
1209 "'XCVelw' (CORE-V Event Load Word)">;
1211 : Predicate<"Subtarget->hasVendorXCVelw()">,
1213 "'XCVelw' (CORE-V Event Load Word)">;
1217 "'XCVbitmanip' (CORE-V Bit Manipulation)">;
1219 : Predicate<"Subtarget->hasVendorXCVbitmanip()">,
1221 "'XCVbitmanip' (CORE-V Bit Manipulation)">;
1225 "'XCVmac' (CORE-V Multiply-Accumulate)">;
1227 : Predicate<"Subtarget->hasVendorXCVmac()">,
1229 "'XCVmac' (CORE-V Multiply-Accumulate)">;
1233 "'XCVmem' (CORE-V Post-incrementing Load & Store)">;
1235 : Predicate<"Subtarget->hasVendorXCVmem()">,
1237 "'XCVmem' (CORE-V Post-incrementing Load & Store)">;
1241 "'XCValu' (CORE-V ALU Operations)">;
1243 : Predicate<"Subtarget->hasVendorXCValu()">,
1245 "'XCValu' (CORE-V ALU Operations)">;
1249 "'XCVsimd' (CORE-V SIMD ALU)">;
1251 : Predicate<"Subtarget->hasVendorXCVsimd()">,
1253 "'XCVsimd' (CORE-V SIMD ALU)">;
1257 "'XCVbi' (CORE-V Immediate Branching)">;
1259 : Predicate<"Subtarget->hasVendorXCVbi()">,
1261 "'XCVbi' (CORE-V Immediate Branching)">;
1269 : Predicate<"Subtarget->hasVendorXwchc()">,
1273 //===----------------------------------------------------------------------===//
1275 //===----------------------------------------------------------------------===//
1283 def IsRV64 : Predicate<"Subtarget->is64Bit()">,
1286 def IsRV32 : Predicate<"!Subtarget->is64Bit()">,
1297 foreach i = {1-31} in
1299 SubtargetFeature<"reserve-x"#i, "UserReservedRegister[RISCV::X"#i#"]",
1302 def FeatureSaveRestore : SubtargetFeature<"save-restore", "EnableSaveRestore",
1305 def FeatureNoTrailingSeqCstFence : SubtargetFeature<"no-trailing-seq-cst-fence",
1308 "Disable trailing fence for seq-cst store.">;
1311 : SubtargetFeature<"unaligned-scalar-mem", "EnableUnalignedScalarMem",
1316 : SubtargetFeature<"unaligned-vector-mem", "EnableUnalignedVectorMem",
1320 def FeaturePostRAScheduler : SubtargetFeature<"use-postra-scheduler",
1324 : SubtargetFeature<"predictable-select-expensive", "PredictableSelectIsExpensive", "true",
1328 : SubtargetFeature<"optimized-zero-stride-load", "HasOptimizedZeroStrideLoad",
1330 "zero-stride vector load">;
1340 : SubtargetFeature<"dlen-factor-2", "DLenFactor2", "true",
1344 : SubtargetFeature<"no-default-unroll", "EnableDefaultUnroll", "false",
1350 : SubtargetFeature<"short-forward-branch-opt", "HasShortForwardBranchOpt",
1352 def HasShortForwardBranchOpt : Predicate<"Subtarget->hasShortForwardBranchOpt()">;
1353 def NoShortForwardBranchOpt : Predicate<"!Subtarget->hasShortForwardBranchOpt()">;
1358 : SubtargetFeature<"no-sink-splat-operands", "SinkSplatOperands",
1363 : SubtargetFeature<"prefer-w-inst", "PreferWInst", "true",
1367 : SubtargetFeature<"conditional-cmv-fusion", "HasConditionalCompressedMoveFusion",
1369 def HasConditionalMoveFusion : Predicate<"Subtarget->hasConditionalMoveFusion()">;
1370 def NoConditionalMoveFusion : Predicate<"!Subtarget->hasConditionalMoveFusion()">;
1373 "SiFive 7-Series processors",
1377 def TuneVentanaVeyron : SubtargetFeature<"ventana-veyron", "RISCVProcFamily", "VentanaVeyron",
1378 "Ventana Veyron-Series processors">;
1380 // Assume that lock-free native-width atomics are available, even if the target
1383 // built with this feature is not ABI-compatible with code built without this
1386 "forced-atomics", "HasForcedAtomics", "true",
1387 "Assume that lock-free native-width atomics are available">;
1389 : Predicate<"Subtarget->hasStdExtA() || Subtarget->hasForcedAtomics()">;
1391 def FeatureTaggedGlobals : SubtargetFeature<"tagged-globals",
1397 "forced-sw-shadow-stack", "HasForcedSWShadowStack", "true",
1399 def HasForcedSWShadowStack : Predicate<"Subtarget->hasForcedSWShadowStack()">;