Lines Matching refs:SrcReg
217 Register SrcReg = MI.getOperand(1).getReg(); in matchUCharToFloat() local
218 unsigned SrcSize = MRI.getType(SrcReg).getSizeInBits(); in matchUCharToFloat()
221 return Helper.getKnownBits()->maskedValueIsZero(SrcReg, Mask); in matchUCharToFloat()
232 Register SrcReg = MI.getOperand(1).getReg(); in applyUCharToFloat() local
234 LLT SrcTy = MRI.getType(SrcReg); in applyUCharToFloat()
236 SrcReg = B.buildAnyExtOrTrunc(S32, SrcReg).getReg(0); in applyUCharToFloat()
239 B.buildInstr(AMDGPU::G_AMDGPU_CVT_F32_UBYTE0, {DstReg}, {SrcReg}, in applyUCharToFloat()
242 auto Cvt0 = B.buildInstr(AMDGPU::G_AMDGPU_CVT_F32_UBYTE0, {S32}, {SrcReg}, in applyUCharToFloat()
319 Register SrcReg = MI.getOperand(1).getReg(); in matchCvtF32UByteN() local
322 bool IsShr = mi_match(SrcReg, MRI, m_GZExt(m_Reg(SrcReg))); in matchCvtF32UByteN()
326 IsShr = mi_match(SrcReg, MRI, m_GLShr(m_Reg(Src0), m_ICst(ShiftAmt))); in matchCvtF32UByteN()
327 if (IsShr || mi_match(SrcReg, MRI, m_GShl(m_Reg(Src0), m_ICst(ShiftAmt)))) { in matchCvtF32UByteN()