3915     SDValue N1 = N->getOperand(1);  in performAssertSZExtCombine()  local
3916     EVT ExtVT = cast<VTSDNode>(N1)->getVT();  in performAssertSZExtCombine()
3922       SDValue NewInReg = DAG.getNode(N->getOpcode(), SL, SrcVT, Src, N1);  in performAssertSZExtCombine()
4235                         SDValue N0, SDValue N1, unsigned Size, bool Signed) {  in getMul24()  argument
4238     return DAG.getNode(MulOpc, SL, MVT::i32, N0, N1);  in getMul24()
4244   SDValue MulLo = DAG.getNode(MulLoOpc, SL, MVT::i32, N0, N1);  in getMul24()
4245   SDValue MulHi = DAG.getNode(MulHiOpc, SL, MVT::i32, N0, N1);  in getMul24()
4279   SDValue N1 = N->getOperand(1);  in performMulCombine()  local
4301     SDValue MulVal = DAG.getNode(N->getOpcode(), DL, VT, N1, MulOper);  in performMulCombine()
4302     return DAG.getNode(ISD::ADD, DL, VT, MulVal, N1);  in performMulCombine()
4305   if (SDValue MulOper = IsFoldableAdd(N1)) {  in performMulCombine()
4321   if (N1.getOpcode() == ISD::ANY_EXTEND)  in performMulCombine()
4322     N1 = N1.getOperand(0);  in performMulCombine()
4326   if (Subtarget->hasMulU24() && isU24(N0, DAG) && isU24(N1, DAG)) {  in performMulCombine()
4328     N1 = DAG.getZExtOrTrunc(N1, DL, MVT::i32);  in performMulCombine()
4329     Mul = getMul24(DAG, DL, N0, N1, Size, false);  in performMulCombine()
4330   } else if (Subtarget->hasMulI24() && isI24(N0, DAG) && isI24(N1, DAG)) {  in performMulCombine()
4332     N1 = DAG.getSExtOrTrunc(N1, DL, MVT::i32);  in performMulCombine()
4333     Mul = getMul24(DAG, DL, N0, N1, Size, true);  in performMulCombine()
4354   SDValue N1 = N->getOperand(1);  in performMulLoHiCombine()  local
4362   if (N1.getOpcode() == ISD::ANY_EXTEND)  in performMulLoHiCombine()
4363     N1 = N1.getOperand(0);  in performMulLoHiCombine()
4370     if (Subtarget->hasMulI24() && isI24(N0, DAG) && isI24(N1, DAG)) {  in performMulLoHiCombine()
4372       N1 = DAG.getSExtOrTrunc(N1, DL, MVT::i32);  in performMulLoHiCombine()
4377     if (Subtarget->hasMulU24() && isU24(N0, DAG) && isU24(N1, DAG)) {  in performMulLoHiCombine()
4379       N1 = DAG.getZExtOrTrunc(N1, DL, MVT::i32);  in performMulLoHiCombine()
4387   SDValue Lo = DAG.getNode(LoOpcode, DL, MVT::i32, N0, N1);  in performMulLoHiCombine()
4388   SDValue Hi = DAG.getNode(HiOpcode, DL, MVT::i32, N0, N1);  in performMulLoHiCombine()
4413   SDValue N1 = N->getOperand(1);  in performMulhsCombine()  local
4415   if (!isI24(N0, DAG) || !isI24(N1, DAG))  in performMulhsCombine()
4419   N1 = DAG.getSExtOrTrunc(N1, DL, MVT::i32);  in performMulhsCombine()
4421   SDValue Mulhi = DAG.getNode(AMDGPUISD::MULHI_I24, DL, MVT::i32, N0, N1);  in performMulhsCombine()
4446   SDValue N1 = N->getOperand(1);  in performMulhuCombine()  local
4448   if (!isU24(N0, DAG) || !isU24(N1, DAG))  in performMulhuCombine()
4452   N1 = DAG.getZExtOrTrunc(N1, DL, MVT::i32);  in performMulhuCombine()
4454   SDValue Mulhi = DAG.getNode(AMDGPUISD::MULHI_U24, DL, MVT::i32, N0, N1);  in performMulhuCombine()
4524                                          SDValue N1,  in distributeOpThroughSelect()  argument
4527   EVT VT = N1.getValueType();  in distributeOpThroughSelect()
4530                                   N1.getOperand(0), N2.getOperand(0));  in distributeOpThroughSelect()
5255     SDValue N1 = N->getOperand(1);  in PerformDAGCombine()  local
5262     ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);  in PerformDAGCombine()
6007                                                Register N0, Register N1) const {  in isReassocProfitable()