3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
102   assert(numOutputSections <= 0xffff && "size of outputSections is too big");  in applySecIdx()
135     error("unsupported relocation type 0x" + Twine::utohexstr(type) + " in " +  in applyRelX64()
155     error("unsupported relocation type 0x" + Twine::utohexstr(type) + " in " +  in applyRelX86()
161   write16le(off, (read16le(off) & 0xfbf0) | ((v & 0x800) >> 1) | ((v >> 12) & 0xf));  in applyMOV()
162   write16le(off + 2, (read16le(off + 2) & 0x8f00) | ((v & 0x700) << 4) | (v & 0xff));  in applyMOV()
167   if ((op1 & 0xfbf0) != (movt ? 0xf2c0 : 0xf240))  in readMOV()
171   if ((op2 & 0x8000) != 0)  in readMOV()
174   return (op2 & 0x00ff) | ((op2 >> 4) & 0x0700) | ((op1 << 1) & 0x0800) |  in readMOV()
175          ((op1 & 0x000f) << 12);  in readMOV()
190   uint32_t s = v < 0 ? 1 : 0;  in applyBranch20T()
193   or16(off, (s << 10) | ((v >> 12) & 0x3f));  in applyBranch20T()
194   or16(off + 2, (j1 << 13) | (j2 << 11) | ((v >> 1) & 0x7ff));  in applyBranch20T()
200   uint32_t s = v < 0 ? 1 : 0;  in applyBranch24T()
203   or16(off, (s << 10) | ((v >> 12) & 0x3ff));  in applyBranch24T()
205   write16le(off + 2, (read16le(off + 2) & 0xd000) | (j1 << 13) | (j2 << 11) | ((v >> 1) & 0x7ff));  in applyBranch24T()
232     error("unsupported relocation type 0x" + Twine::utohexstr(type) + " in " +  in applyRelARM()
243       SignExtend64<21>(((orig >> 29) & 0x3) | ((orig >> 3) & 0x1FFFFC));  in applyArm64Addr()
246   uint32_t immLo = (imm & 0x3) << 29;  in applyArm64Addr()
247   uint32_t immHi = (imm & 0x1FFFFC) << 3;  in applyArm64Addr()
248   uint64_t mask = (0x3 << 29) | (0x1FFFFC << 3);  in applyArm64Addr()
257   imm += (orig >> 10) & 0xFFF;  in applyArm64Imm()
258   orig &= ~(0xFFF << 10);  in applyArm64Imm()
259   write32le(off, orig | ((imm & (0xFFF >> rangeLimit)) << 10));  in applyArm64Imm()
273   // 0x04000000 indicates SIMD/FP registers  in applyArm64Ldr()
274   // 0x00800000 indicates 128 bit  in applyArm64Ldr()
275   if ((orig & 0x4800000) == 0x4800000)  in applyArm64Ldr()
277   if ((imm & ((1 << size) - 1)) != 0)  in applyArm64Ldr()
285     applyArm64Imm(off, (s - os->getRVA()) & 0xfff, 0);  in applySecRelLow12A()
293   if (0xfff < secRel) {  in applySecRelHigh12A()
298   applyArm64Imm(off, secRel & 0xfff, 0);  in applySecRelHigh12A()
304     applyArm64Ldr(off, (s - os->getRVA()) & 0xfff);  in applySecRelLdr()
310   or32(off, (v & 0x0FFFFFFC) >> 2);  in applyArm64Branch26()
316   or32(off, (v & 0x001FFFFC) << 3);  in applyArm64Branch19()
322   or32(off, (v & 0x0000FFFC) << 3);  in applyArm64Branch14()
330   case IMAGE_REL_ARM64_REL21:          applyArm64Addr(off, s, p, 0); break;  in applyRelARM64()
331   case IMAGE_REL_ARM64_PAGEOFFSET_12A: applyArm64Imm(off, s & 0xfff, 0); break;  in applyRelARM64()
332   case IMAGE_REL_ARM64_PAGEOFFSET_12L: applyArm64Ldr(off, s & 0xfff); break;  in applyRelARM64()
352     error("unsupported relocation type 0x" + Twine::utohexstr(type) + " in " +  in applyRelARM64()
571 // in bits, or 0 if the relocation cannot be handled as a runtime pseudo
614       return 0;  in getRuntimePseudoRelocSize()
622       return 0;  in getRuntimePseudoRelocSize()
629       return 0;  in getRuntimePseudoRelocSize()
638       return 0;  in getRuntimePseudoRelocSize()
666     if (sizeInBits == 0) {  in getRuntimePseudoRelocs()
731     warn("ignoring section " + sectionName + " with unrecognized magic 0x" +  in consumeDebugMagic()
774   buf[str.size()] = '\0';  in writeTo()
811   int64_t off = impSymbol->getRVA() & 0xfff;  in writeTo()
819     0x40, 0xf2, 0x00, 0x0c, // P:  movw ip,:lower16:S - (P + (L1-P) + 4)
820     0xc0, 0xf2, 0x00, 0x0c, //     movt ip,:upper16:S - (P + (L1-P) + 4)
821     0xe7, 0x44,             // L1: add  pc, ip
840     0x10, 0x00, 0x00, 0x90, // adrp x16, Dest
841     0x10, 0x02, 0x00, 0x91, // add  x16, x16, :lo12:Dest
842     0x00, 0x02, 0x1f, 0xd6, // br   x16
854   applyArm64Addr(buf + 0, target->getRVA(), rva, 12);  in writeTo()
855   applyArm64Imm(buf + 4, target->getRVA() & 0xfff, 0);  in writeTo()
879   size_t cnt = 0;  in writeTo()
895     const auto &sym = std::get<0>(t);  in writeTo()
898     flag.flag = 0;  in writeTo()
914   for (uint32_t i = 0; i < map.size(); i++) {  in writeTo()
925     return 0;  in getSize()
937   table[0] = 0;  in writeTo()
938   table[1] = 0;  in writeTo()
943     table[idx + 0] = rpr.sym->getRVA();  in writeTo()
971 // For example, let's say we have 0x00030, 0x00500, 0x00700, 0x00A00,
972 // 0x20004, and 0x20008 in a .reloc section for x64. The uppermost 4
973 // bits have a type IMAGE_REL_BASED_DIR64 or 0xA. In the section, they
976 //   0x00000  -- page address (4 bytes)
978 //     0xA030 -- entries (2 bytes each)
979 //     0xA500
980 //     0xA700
981 //     0xAA00
982 //   0x20000  -- page address (4 bytes)
984 //     0xA004 -- entries (2 bytes each)
985 //     0xA008