History log of /linux/scripts/dtc/include-prefixes/dt-bindings/clock/sophgo,sg2044-clk.h (Results 1 – 8 of 8)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v6.16, v6.16-rc7, v6.16-rc6, v6.16-rc5, v6.16-rc4
# 74f1af95 29-Jun-2025 Rob Clark <robin.clark@oss.qualcomm.com>

Merge remote-tracking branch 'drm/drm-next' into msm-next

Back-merge drm-next to (indirectly) get arm-smmu updates for making
stall-on-fault more reliable.

Signed-off-by: Rob Clark <robin.clark@oss

Merge remote-tracking branch 'drm/drm-next' into msm-next

Back-merge drm-next to (indirectly) get arm-smmu updates for making
stall-on-fault more reliable.

Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>

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Revision tags: v6.16-rc3, v6.16-rc2
# c598d5eb 11-Jun-2025 Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-next into drm-misc-next

Backmerging to forward to v6.16-rc1

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>


# 86e2d052 09-Jun-2025 Thomas Hellström <thomas.hellstrom@linux.intel.com>

Merge drm/drm-next into drm-xe-next

Backmerging to bring in 6.16

Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>


# 34c55367 09-Jun-2025 Jani Nikula <jani.nikula@intel.com>

Merge drm/drm-next into drm-intel-next

Sync to v6.16-rc1, among other things to get the fixed size GENMASK_U*()
and BIT_U*() macros.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>


Revision tags: v6.16-rc1
# 9f32a03e 30-May-2025 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This has been a semi-quiet cycle. The core framework remains unchanged
th

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This has been a semi-quiet cycle. The core framework remains unchanged
this time around.

In terms of shiny new code though, we have support for the SpacemiT K1
SoC, Sophgo SG2044, and T-HEAD TH1520 VO clk drivers joining the usual
silicon players like Qualcomm, Samsung, Allwinner, and Renesas.

Surprisingly, the Qualcomm pile was smaller than usual but that is
likely because they put one SoC support inside a driver for a
different SoC that is very similar.

Other than all those new clk drivers there are the usual clk data
updates to fix parents, frequency tables, and add missing clks along
with some Kconfig changes to make compile testing simpler and even
more DT binding conversions to boot.

The exciting part is still the new SoC support like SpacemiT and
Sophgo support though, which really dominate the diffstat because they
introduce a whole new silicon vendor clk driver.

New Drivers:
- Camera clock controller driver for Qualcomm QCS8300
- DE (display engine) 3.3 clocks on Allwinner H616
- Samsung ExynosAutov920 CPU cluster CL0, CL1 and CL2 clock controllers
- Video Output (VO) subsystem clk controller in the T-HEAD TH1520 SoC
- Clock driver for Sophgo SG2044
- Clock driver for SpacemiT K1 SoC
- Renesas RZ/V2N (R9A09G056) SoC clk driver

Updates:
- Correct data in various SoC clk drivers
- Allow clkaN to be optional in the Qualcomm RPMh clock controller
driver if command db doesn't define it
- Change Kconfig options to not enable by default during compile
testing
- Add missing clks in various SoC clk drivers
- Remove some duplicate clk DT bindings and convert some more to
YAML"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits)
clk: qcom: gcc-x1e80100: Set FORCE MEM CORE for UFS clocks
clk: qcom: gcc: Set FORCE_MEM_CORE_ON for gcc_ufs_axi_clk for 8650/8750
clk: qcom: rpmh: make clkaN optional
clk: qcom: Add support for Camera Clock Controller on QCS8300
clk: rockchip: rk3528: add slab.h header include
clk: rockchip: rk3576: add missing slab.h include
clk: meson: Do not enable by default during compile testing
clk: meson-g12a: add missing fclk_div2 to spicc
clk: qcom: gcc-msm8939: Fix mclk0 & mclk1 for 24 MHz
clk: rockchip: rename gate-grf clk file
clk: rockchip: rename branch_muxgrf to branch_grf_mux
clk: sunxi-ng: ccu: add Display Engine 3.3 (DE33) support
dt-bindings: allwinner: add H616 DE33 clock binding
clk: samsung: correct clock summary for hsi1 block
dt-bindings: clock: add SM6350 QCOM video clock bindings
clk: rockchip: Pass NULL as reg pointer when registering GRF MMC clocks
clk: sunxi-ng: h616: Add LVDS reset for LCD TCON
dt-bindings: clock: sun50i-h616-ccu: Add LVDS reset
clk: rockchip: rk3036: mark ddrphy as critical
clk: rockchip: rk3036: fix implementation of usb480m clock mux
...

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# 3e515fc8 29-May-2025 Stephen Boyd <sboyd@kernel.org>

Merge branches 'clk-socfpga', 'clk-sophgo', 'clk-thead' and 'clk-samsung' into clk-next

* clk-socfpga:
clk: socfpga: stratix10: Optimize local variables
clk: socfpga: clk-pll: Optimize local var

Merge branches 'clk-socfpga', 'clk-sophgo', 'clk-thead' and 'clk-samsung' into clk-next

* clk-socfpga:
clk: socfpga: stratix10: Optimize local variables
clk: socfpga: clk-pll: Optimize local variables

* clk-sophgo:
clk: sophgo: Add clock controller support for SG2044 SoC
clk: sophgo: Add PLL clock controller support for SG2044 SoC
dt-bindings: clock: sophgo: add clock controller for SG2044
dt-bindings: soc: sophgo: Add SG2044 top syscon device
clk: sophgo: Add support for newly added precise compatible
dt-bindings: clock: sophgo: Use precise compatible for CV1800 series SoC

* clk-thead:
clk: thead: Add clock support for VO subsystem in T-HEAD TH1520 SoC
dt-bindings: clock: thead: Add TH1520 VO clock controller

* clk-samsung:
clk: samsung: correct clock summary for hsi1 block
clk: samsung: exynosautov920: Fix incorrect CLKS_NR_CPUCL0 definition
clk: samsung: exynosautov920: add cpucl1/2 clock support
dt-bindings: clock: exynosautov920: add cpucl1/2 clock definitions
clk: samsung: exynosautov920: add cpucl0 clock support
dt-bindings: clock: exynosautov920: add cpucl0 clock definitions
clk: samsung: Use samsung CCF common function

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Revision tags: v6.15
# a08f0ac3 22-May-2025 Stephen Boyd <sboyd@kernel.org>

Merge tag 'riscv-sophgo-clk-for-v6.16' of https://github.com/sophgo/linux into clk-sophgo

Pull RISC-V Sophgo clk driver updates from Chen Wang:

- Replace compatible for Sophgo CV1800 series SoC
-

Merge tag 'riscv-sophgo-clk-for-v6.16' of https://github.com/sophgo/linux into clk-sophgo

Pull RISC-V Sophgo clk driver updates from Chen Wang:

- Replace compatible for Sophgo CV1800 series SoC
- Add clock support for Sophgo SG2044

* tag 'riscv-sophgo-clk-for-v6.16' of https://github.com/sophgo/linux:
clk: sophgo: Add clock controller support for SG2044 SoC
clk: sophgo: Add PLL clock controller support for SG2044 SoC
dt-bindings: clock: sophgo: add clock controller for SG2044
dt-bindings: soc: sophgo: Add SG2044 top syscon device
clk: sophgo: Add support for newly added precise compatible
dt-bindings: clock: sophgo: Use precise compatible for CV1800 series SoC

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Revision tags: v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3
# 1a215904 18-Apr-2025 Inochi Amaoto <inochiama@gmail.com>

dt-bindings: clock: sophgo: add clock controller for SG2044

The clock controller on the SG2044 provides common clock function
for all IPs on the SoC. This device requires PLL clock to function
norma

dt-bindings: clock: sophgo: add clock controller for SG2044

The clock controller on the SG2044 provides common clock function
for all IPs on the SoC. This device requires PLL clock to function
normally.

Add definition for the clock controller of the SG2044 SoC.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250418020325.421257-4-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

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