Merge tag 'soc-dt-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC device tree updates from Arnd Bergmann:
"There is very little going on with new SoC support this time, all t

Merge tag 'soc-dt-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC device tree updates from Arnd Bergmann:
"There is very little going on with new SoC support this time, all the
new chips are variations of others that we already support, and they
are all based on ARMv8 cores:

- Mediatek MT7981B (Filogic 820) and MT7988A (Filogic 880) are
networking SoCs designed to be used in wireless routers, similar to
the already supported MT7986A (Filogic 830).

- NXP i.MX8DXP is a variant of i.MX8QXP, with two CPU cores less.
These are used in many embedded and industrial applications.

- Renesas R8A779G2 (R-Car V4H ES2.0) and R8A779H0 (R-Car V4M) are
automotive SoCs.

- TI J722S is another automotive variant of its K3 family, related to
the AM62 series.

There are a total of 7 new arm32 machines and 45 arm64 ones, including

- Two Android phones based on the old Tegra30 chip

- Two machines using Cortex-A53 SoCs from Allwinner, a mini PC and a
SoM development board

- A set-top box using Amlogic Meson G12A S905X2

- Eight embedded board using NXP i.MX6/8/9

- Three machines using Mediatek network router chips

- Ten Chromebooks, all based on Mediatek MT8186

- One development board based on Mediatek MT8395 (Genio 1200)

- Seven tablets and phones based on Qualcomm SoCs, most of them from
Samsung.

- A third development board for Qualcomm SM8550 (Snapdragon 8 Gen 2)

- Three variants of the "White Hawk" board for Renesas automotive
SoCs

- Ten Rockchips RK35xx based machines, including NAS, Tablet, Game
console and industrial form factors.

- Three evaluation boards for TI K3 based SoCs

The other changes are mainly the usual feature additions for existing
hardware, cleanups, and dtc compile time fixes. One notable change is
the inclusion of PowerVR SGX GPU nodes on TI SoCs"

* tag 'soc-dt-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (824 commits)
riscv: dts: Move BUILTIN_DTB_SOURCE to common Kconfig
riscv: dts: starfive: jh7100: fix root clock names
ARM: dts: samsung: exynos4412: decrease memory to account for unusable region
arm64: dts: qcom: sm8250-xiaomi-elish: set rotation
arm64: dts: qcom: sm8650: Fix SPMI channels size
arm64: dts: qcom: sm8550: Fix SPMI channels size
arm64: dts: rockchip: Fix name for UART pin header on qnap-ts433
arm: dts: marvell: clearfog-gtr-l8: align port numbers with enclosure
arm: dts: marvell: clearfog-gtr-l8: add support for second sfp connector
dt-bindings: soc: renesas: renesas-soc: Add pattern for gray-hawk
dtc: Enable dtc interrupt_provider check
arm64: dts: st: add video encoder support to stm32mp255
arm64: dts: st: add video decoder support to stm32mp255
ARM: dts: stm32: enable crypto accelerator on stm32mp135f-dk
ARM: dts: stm32: enable CRC on stm32mp135f-dk
ARM: dts: stm32: add CRC on stm32mp131
ARM: dts: add stm32f769-disco-mb1166-reva09
ARM: dts: stm32: add display support on stm32f769-disco
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco
ARM: dts: stm32: add DSI support on stm32f769
...

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Merge tag 'zynqmp-dt-for-6.9' of https://github.com/Xilinx/linux-xlnx into soc/dt

arm64: ZynqMP DT changes for 6.9

dt-bindings:
- Describe firmware for Versal NET
- Describe all firmware child node

Merge tag 'zynqmp-dt-for-6.9' of https://github.com/Xilinx/linux-xlnx into soc/dt

arm64: ZynqMP DT changes for 6.9

dt-bindings:
- Describe firmware for Versal NET
- Describe all firmware child nodes
- Align versal-fpga node name with dt schema
- Describe k26 rev2 and kv260

DTs:
- Align firmware node with dt schema
- Add an optee node
- Describe reset for CANs
- Update ECAM size to discover up to 256 buses
- Describe assigned-clocks for uarts
- Add u-boot node
- Comment SMMU entries
- Align dwc3 nodes with dt schema
- Rename i2c groups to match dt schema
- Small DT updates (comments)
- Fix default clock frequency for si570 (zcu102, zcu106)
- Add output-enable pins and cover MIO38 (SOM)

* tag 'zynqmp-dt-for-6.9' of https://github.com/Xilinx/linux-xlnx: (21 commits)
dt-bindings: firmware: xilinx: Describe soc-nvmem subnode
dt-bindings: soc: xilinx: Add support for KV260 CC
dt-bindings: soc: xilinx: Add support for K26 rev2 SOMs
arm64: zynqmp: Align usb clock nodes with binding
arm64: zynqmp: Comment all smmu entries
arm64: zynqmp: Rename i2c?-gpio to i2c?-gpio-grp
arm64: zynqmp: Disable Tri-state for MIO38 Pin
arm64: zynqmp: Remove incorrect comment from kv260s
arm64: zynqmp: Introduce u-boot options node with bootscr-address
arm64: zynqmp: Fix comment to be aligned with board name.
arm64: zynqmp: Update ECAM size to discover up to 256 buses
arm64: zynqmp: Describe assigned-clocks for uarts
arm64: zynqmp: Setup default si570 frequency to 156.25MHz
arm64: zynqmp: Add resets property for CAN nodes
arm64: zynqmp: Add an OP-TEE node to the device tree
arm64: zynqmp: Add output-enable pins to SOMs
arm64: zynqmp: Rename zynqmp-power node to power-management
dt-bindings: firmware: xilinx: Sort node names (clock-controller)
dt-bindings: firmware: xilinx: Describe missing child nodes
dt-bindings: firmware: xilinx: Fix versal-fpga node name
...

Link: https://lore.kernel.org/r/CAHTX3dLEoFMTGg1Q4+OuOwWYd8N73YBTXki8Vvj3cGHUpLJ0=A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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Merge tag 'v6.8-rc4' into x86/percpu, to resolve conflicts and refresh the branch

Conflicts:
arch/x86/include/asm/percpu.h
arch/x86/include/asm/text-patching.h

Signed-off-by: Ingo Molnar <mingo@k

Merge tag 'v6.8-rc4' into x86/percpu, to resolve conflicts and refresh the branch

Conflicts:
arch/x86/include/asm/percpu.h
arch/x86/include/asm/text-patching.h

Signed-off-by: Ingo Molnar <mingo@kernel.org>

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Merge branch 'linus' into x86/mm, to refresh the branch and pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>

arm64: zynqmp: Align usb clock nodes with binding

dwc3-xilinx.yaml defines 2 clocks which are not defined that's why define
them (bus_early clock is moved to bus_clk in glue logic).
With also descri

arm64: zynqmp: Align usb clock nodes with binding

dwc3-xilinx.yaml defines 2 clocks which are not defined that's why define
them (bus_early clock is moved to bus_clk in glue logic).
With also describing kv260 assigned clock rates with assigned clocks.
Also add missing status property to standard dwc3 core.

Link: https://lore.kernel.org/r/aa4c65a8997c7a65f23da3a3088bb5eb64281307.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

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arm64: zynqmp: Comment all smmu entries

SMMU is disabled by default and not all masters can be enabled at the same
time because of limited number of entries. That's why comment all iommu
properties

arm64: zynqmp: Comment all smmu entries

SMMU is disabled by default and not all masters can be enabled at the same
time because of limited number of entries. That's why comment all iommu
properties but keep them for reference in DT. In XEN case they should be
added back and Xen should have SMMU enabled by default.
Also add IDs for DP and DPDMA.

Link: https://lore.kernel.org/r/bdb012b1c86abb0d9aa88954196d886d1283e9b1.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

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arm64: zynqmp: Introduce u-boot options node with bootscr-address

Add u-boot options node with details about bootscr-address.
c&p description from dtschema/schemas/options/u-boot.yaml:

"Holds the f

arm64: zynqmp: Introduce u-boot options node with bootscr-address

Add u-boot options node with details about bootscr-address.
c&p description from dtschema/schemas/options/u-boot.yaml:

"Holds the full address of the boot script file. It helps in making
automated flow easier by fetching the 64bit address directly from DT.
Value should be automatically copied to the U-Boot 'scriptaddr' variable.
When it is defined, bootscr-ram-offset property should be ignored.
Actually only one of them should be present in the DT."

Address is generic for all zynqmp boards because all of them have DDR
starting from 0. Custom boards should revisit the location and aligned it
based on their needs.

Link: https://lore.kernel.org/r/4f5978d5a26fe0cd0cc6e54a97da1517bb925c01.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

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arm64: zynqmp: Update ECAM size to discover up to 256 buses

Update ECAM size to discover up to 256 buses.

Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Link: https://lore.kerne

arm64: zynqmp: Update ECAM size to discover up to 256 buses

Update ECAM size to discover up to 256 buses.

Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Link: https://lore.kernel.org/r/4f7621a790f4aa35b3e7f74683d3ae4ffe820667.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

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arm64: zynqmp: Add resets property for CAN nodes

Added resets property for CAN nodes.

Signed-off-by: Srinivas Neeli <srinivas.neeli@amd.com>
Link: https://lore.kernel.org/r/7bf0cc230f3c25010f9545f3

arm64: zynqmp: Add resets property for CAN nodes

Added resets property for CAN nodes.

Signed-off-by: Srinivas Neeli <srinivas.neeli@amd.com>
Link: https://lore.kernel.org/r/7bf0cc230f3c25010f9545f3f92f6f15a95d21ec.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

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arm64: zynqmp: Add an OP-TEE node to the device tree

Since the zynqmp boards can run upstream OP-TEE, and having the DT node
present doesn't cause any side effects add it in case someone tries to
lo

arm64: zynqmp: Add an OP-TEE node to the device tree

Since the zynqmp boards can run upstream OP-TEE, and having the DT node
present doesn't cause any side effects add it in case someone tries to
load OP-TEE.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://lore.kernel.org/r/9ee7e8c263c453a8c9e6bc3b91fad78b0f54edc0.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

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arm64: zynqmp: Rename zynqmp-power node to power-management

Rename zynqmp-power node name to power-management which is more aligned
with generic node name recommendation.

Link: https://lore.kernel.

arm64: zynqmp: Rename zynqmp-power node to power-management

Rename zynqmp-power node name to power-management which is more aligned
with generic node name recommendation.

Link: https://lore.kernel.org/r/bf24cde92c2b9e2824847687fab69fc25c533d53.1703161663.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

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Merge branch 'master' into mm-hotfixes-stable

Merge v6.8-rc1 into drm-misc-fixes

Let's kickstart the 6.8 fix cycle.

Signed-off-by: Maxime Ripard <mripard@kernel.org>

Merge drm/drm-next into drm-intel-gt-next

Work that needs to land in drm-intel-gt-next depends on two patches only
present in drm-intel-next, absence of which is causing a merge conflict:

3b918f4

Merge drm/drm-next into drm-intel-gt-next

Work that needs to land in drm-intel-gt-next depends on two patches only
present in drm-intel-next, absence of which is causing a merge conflict:

3b918f4f0c8b ("drm/i915/pxp: Optimize GET_PARAM:PXP_STATUS")
ac765b7018f6 ("drm/i915/pxp/mtl: intel_pxp_init_hw needs runtime-pm inside pm-complete")

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

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Merge tag 'soc-dt-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC DT updates from Arnd Bergmann:
"There is one new SoC for each 32-bit Arm and 64-bit RISC-V, but both
the R

Merge tag 'soc-dt-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC DT updates from Arnd Bergmann:
"There is one new SoC for each 32-bit Arm and 64-bit RISC-V, but both
the Rockchips rv1109 and Sopgho CV1812H are just minor variations of
already supported chips.

The other six new SoCs are all part of existing arm64 families, but
are somewhat more interesting:

- Samsung ExynosAutov920 is an automotive chip, and the first one we
support based on the Cortex-A78AE core with lockstep mode.

- Google gs101 (Tensor G1) is the chip used in a number of Pixel
phones, and is grouped with Samsung Exynos here since it is based
on the same SoC design, sharing most of its IP blocks with that
series.

- MediaTek MT8188 is a new chip used for mid-range tablets and
Chromebooks, using two Cortex-A78 cores where the older MT8195 had
four of them.

- Qualcomm SM8650 (Snapdragon 8 Gen 3) is their current top range
phone SoC and the first supported chip based on Cortex-X4,
Cortex-A720 and Cortex-A520.

- Qualcomm X1E80100 (Snapdragon X Elite) in turn is the latest Laptop
chip using the custom Oryon cores.

- Unisoc UMS9620 (Tanggula 7 series) is a 5G phone SoC based on
Cortex-A76 and Cortex-A55

In terms of boards, we have

- Five old Microsoft Lumia phones, the HTC One Mini 2, Motorola Moto
G 4G, and Huawei Honor 5X/GR5, all based on Snapdragon SoCs.

- Multiple Rockchips mobile gaming systems (Anbernic RG351V, Powkiddy
RK2023, Powkiddy X55) along with the Sonoff iHost Smart Home Hub
and a few Rockchips SBCs

- Some ComXpress boards based on Marvell CN913x, which is the
follow-up to Armada 7xxx/8xxx.

- Six new industrial/embedded boards based on NXP i.MX8 and i.MX9

- Mediatek MT8183 based Chromebooks from Lenovo, Asus and Acer.

- Toradex Verdin AM62 Mallow carrier for TI AM62

- Huashan Pi board based on the SophGo CV1812H RISC-V chip

- Two boards based on Allwinner H616/H618

- A number of reference boards for various added SoCs from Qualcomm,
Mediatek, Google, Samsung, NXP and Spreadtrum

As usual, there are cleanups and warning fixes across all platforms as
well as added features for several of them"

* tag 'soc-dt-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (857 commits)
ARM: dts: usr8200: Fix phy registers
arm64: dts: intel: minor whitespace cleanup around '='
arm64: dts: socfpga: agilex: drop redundant status
arm64: dts: socfpga: agilex: add unit address to soc node
arm64: dts: socfpga: agilex: move firmware out of soc node
arm64: dts: socfpga: agilex: move FPGA region out of soc node
arm64: dts: socfpga: agilex: align pin-controller name with bindings
arm64: dts: socfpga: stratix10_swvp: drop unsupported DW MSHC properties
arm64: dts: socfpga: stratix10_socdk: align NAND chip name with bindings
arm64: dts: socfpga: stratix10: add unit address to soc node
arm64: dts: socfpga: stratix10: move firmware out of soc node
arm64: dts: socfpga: stratix10: move FPGA region out of soc node
arm64: dts: socfpga: stratix10: align pincfg nodes with bindings
arm64: dts: socfpga: stratix10: add clock-names to DWC2 USB
arm64: dts: socfpga: drop unsupported cdns,page-size and cdns,block-size
ARM: dts: socfpga: align NAND controller name with bindings
ARM: dts: socfpga: drop unsupported cdns,page-size and cdns,block-size
arm64: dts: rockchip: Fix led pinctrl of lubancat 1
arm64: dts: rockchip: correct gpio_pwrctrl1 typo on nanopc-t6
arm64: dts: rockchip: correct gpio_pwrctrl1 typo on rock-5b
...

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Merge tag 'zynqmp-dt-for-6.8' of https://github.com/Xilinx/linux-xlnx into soc/dt

arm64: ZynqMP DT changes for 6.8

- Fix overlay rules to remove KR260 targets
- Move ethernet phys to mdio node
- Fi

Merge tag 'zynqmp-dt-for-6.8' of https://github.com/Xilinx/linux-xlnx into soc/dt

arm64: ZynqMP DT changes for 6.8

- Fix overlay rules to remove KR260 targets
- Move ethernet phys to mdio node
- Fix couple of issues reported by W=1
- Do not use _ in node names
- Use lowercase in register address
- Remove address/size-cells from nodes without child
- Moved fixed clock to root on KV260
- Fix issues reported by dt-schema
- additional compatible string for qspi on SOM
- Move arm/xilinx.yaml to soc vendor to cover also other archs
- Describe new Microblaze V qemu platform
- Add missing mailbox destination compatible string

* tag 'zynqmp-dt-for-6.8' of https://github.com/Xilinx/linux-xlnx:
arm64: zynqmp: Add missing destination mailbox compatible
arm64: zynqmp: Fix clock node name in kv260 cards
arm64: zynqmp: Move fixed clock to / for kv260
dt-bindings: soc: Add new board description for MicroBlaze V
dt-bindings: soc: xilinx: Move xilinx.yaml from arm to soc
arm64: xilinx: Remove address/size-cells from gem nodes
arm64: xilinx: Remove address/size-cells from flash node
arm64: xilinx: Put ethernet phys to mdio node
arm64: xilinx: Remove mt25qu512a compatible string from SOM
arm64: xilinx: Use lower case for partition address
arm64: xilinx: Do not use '_' in DT node names
arm64: dts: xilinx: Apply overlays to base dtbs

Link: https://lore.kernel.org/r/CAHTX3dLyA1Y9guLKSNJTChFVvkspMfTa0odULyAdcuFUSiSH3A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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arm64: zynqmp: Add missing destination mailbox compatible

The commit 81186dc16101 ("dt-bindings: zynqmp: add destination mailbox
compatible") make compatible string for child nodes mandatory that's

arm64: zynqmp: Add missing destination mailbox compatible

The commit 81186dc16101 ("dt-bindings: zynqmp: add destination mailbox
compatible") make compatible string for child nodes mandatory that's why
add it.

Signed-off-by: Michal Simek <michal.simek@amd.com>

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arm64: xilinx: Remove address/size-cells from gem nodes

Some boards are using one mdio bus which holds multiple phys and also
boards are using mdio node for bus description. That's why there are cas

arm64: xilinx: Remove address/size-cells from gem nodes

Some boards are using one mdio bus which holds multiple phys and also
boards are using mdio node for bus description. That's why there are cases
where address/size-cells are unnecessary which is also reported by make W=1
dtbs. That's why remove them from zynqmp.dtsi and let board DTSes to handle
it based on used description.

Error log:
/axi/ethernet@ff0e0000: unnecessary #address-cells/#size-cells without
"ranges" or child "reg" property

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7252203d52af3ca8867764c8514affc4828e530d.1695040866.git.michal.simek@amd.com

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arm64: xilinx: Do not use '_' in DT node names

Character '_' not recommended in node name. Use '-' instead.
Pretty much run seds below for node names.
s/zynqmp_ipi/zynqmp-ipi/
s/nvmem_firmware/nvmem

arm64: xilinx: Do not use '_' in DT node names

Character '_' not recommended in node name. Use '-' instead.
Pretty much run seds below for node names.
s/zynqmp_ipi/zynqmp-ipi/
s/nvmem_firmware/nvmem-firmware/
s/soc_revision/soc-revision/
s/si5335_/si5335-/

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5137958580c85a35cf6aadd1c33a2f6bcf81a9e5.1695040866.git.michal.simek@amd.com

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Merge branch 'next' into for-linus

Prepare input updates for 6.7 merge window.

Merge branch 'linus' into smp/core

Pull in upstream to get the fixes so depending changes can be applied.

Merge drm/drm-next into drm-misc-next

Updating drm-misc-next to the state of Linux v6.6-rc2.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge tag 'v6.6-rc4' into perf/core, to pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>

Merge tag 'v6.6-rc2' into locking/core, to pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>

Merge drm/drm-next into drm-intel-next

Sync to v6.6-rc1.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>