History log of /linux/drivers/soc/mediatek/mtk-mmsys.c (Results 226 – 233 of 233)
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# 1f9adbc7 18-May-2020 Matthias Brugger <matthias.bgg@gmail.com>

clk/soc: mediatek: mt8183: Bind clock driver from platform device

The mmsys driver is now the top level entry point for the multimedia
system (mmsys), we bind the clock driver by creating a platform

clk/soc: mediatek: mt8183: Bind clock driver from platform device

The mmsys driver is now the top level entry point for the multimedia
system (mmsys), we bind the clock driver by creating a platform device.
We also bind the MediaTek DRM driver which is not yet implement and
therefor will errror out for now.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200518113156.25009-1-matthias.bgg@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

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Revision tags: v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1
# c292b133 01-Apr-2020 Enric Balletbo i Serra <enric.balletbo@collabora.com>

clk / soc: mediatek: Bind clock and gpu driver for mt2701

Now that the mmsys driver is the top-level entry point for the
multimedia subsystem, we could bind the clock and the gpu driver on
those dev

clk / soc: mediatek: Bind clock and gpu driver for mt2701

Now that the mmsys driver is the top-level entry point for the
multimedia subsystem, we could bind the clock and the gpu driver on
those devices that is expected to work, so the drm driver is
intantiated by the mmsys driver and display, hopefully, working again.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200401201736.2980433-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

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# 9c5a0a3a 01-Apr-2020 Enric Balletbo i Serra <enric.balletbo@collabora.com>

clk / soc: mediatek: Bind clock and gpu driver for mt2712

Now that the mmsys driver is the top-level entry point for the
multimedia subsystem, we could bind the clock and the gpu driver on
those dev

clk / soc: mediatek: Bind clock and gpu driver for mt2712

Now that the mmsys driver is the top-level entry point for the
multimedia subsystem, we could bind the clock and the gpu driver on
those devices that is expected to work, so the drm driver is
intantiated by the mmsys driver and display, hopefully, working again on
those devices.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200401201736.2980433-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

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# ff34e17c 06-May-2020 Wei Yongjun <weiyongjun1@huawei.com>

soc: mediatek: Missing platform_device_unregister() on error in mtk_mmsys_probe()

Add the missing platform_device_unregister() before return
from mtk_mmsys_probe() in the error handling case.

Fixes

soc: mediatek: Missing platform_device_unregister() on error in mtk_mmsys_probe()

Add the missing platform_device_unregister() before return
from mtk_mmsys_probe() in the error handling case.

Fixes: 667c769246b0 ("soc / drm: mediatek: Fix mediatek-drm device probing")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20200506141317.119537-1-weiyongjun1@huawei.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

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# 1a6e55ca 06-May-2020 Geert Uytterhoeven <geert+renesas@glider.be>

soc: mediatek: mmsys: Drop <linux/clk-provider.h>

After the split, the mt8173 MMSYS driver is no longer a clock provider,
and thus does not need to include <linux/clk-provider.h>.

Fixes: 13032709e2

soc: mediatek: mmsys: Drop <linux/clk-provider.h>

After the split, the mt8173 MMSYS driver is no longer a clock provider,
and thus does not need to include <linux/clk-provider.h>.

Fixes: 13032709e2328553 ("clk / soc: mediatek: Move mt8173 MMSYS to platform driver")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200506120204.31422-1-geert+renesas@glider.be
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

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Revision tags: v5.6
# 667c7692 25-Mar-2020 Enric Balletbo i Serra <enric.balletbo@collabora.com>

soc / drm: mediatek: Fix mediatek-drm device probing

In the actual implementation the same compatible string
"mediatek,<chip>-mmsys" is used to bind the clock drivers
(drivers/soc/mediatek) as well

soc / drm: mediatek: Fix mediatek-drm device probing

In the actual implementation the same compatible string
"mediatek,<chip>-mmsys" is used to bind the clock drivers
(drivers/soc/mediatek) as well as to the gpu driver
(drivers/gpu/drm/mediatek/mtk_drm_drv.c). This ends with the problem
that the only probed driver is the clock driver and there is no display
at all.

In any case having the same compatible string for two drivers is not
correct and should be fixed. To fix this, and maintain backward
compatibility, we can consider that the mmsys driver is the top-level
entry point for the multimedia subsystem, so is not a pure clock
controller but a system controller, and the drm driver is instantiated
by that MMSYS driver.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Acked-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

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# 2c758e30 25-Mar-2020 Enric Balletbo i Serra <enric.balletbo@collabora.com>

soc / drm: mediatek: Move routing control to mmsys device

Provide a mtk_mmsys_ddp_connect() and mtk_mmsys_disconnect() functions to
replace mtk_ddp_add_comp_to_path() and mtk_ddp_remove_comp_from_pa

soc / drm: mediatek: Move routing control to mmsys device

Provide a mtk_mmsys_ddp_connect() and mtk_mmsys_disconnect() functions to
replace mtk_ddp_add_comp_to_path() and mtk_ddp_remove_comp_from_path().
Those functions will allow DRM driver and others to control the data
path routing.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Acked-by: CK Hu <ck.hu@mediatek.com>
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

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# 13032709 25-Mar-2020 Matthias Brugger <mbrugger@suse.com>

clk / soc: mediatek: Move mt8173 MMSYS to platform driver

There is no strong reason for this to use CLK_OF_DECLARE instead of
being a platform driver. Plus, MMSYS provides clocks but also a shared
r

clk / soc: mediatek: Move mt8173 MMSYS to platform driver

There is no strong reason for this to use CLK_OF_DECLARE instead of
being a platform driver. Plus, MMSYS provides clocks but also a shared
register space for the mediatek-drm and the mediatek-mdp
driver. So move the MMSYS clocks to a new platform driver and also
create a new MMSYS platform driver in drivers/soc/mediatek that
instantiates the clock driver.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

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