History log of /linux/drivers/pinctrl/visconti/pinctrl-common.c (Results 26 – 27 of 27)
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Revision tags: v5.10-rc1
# b4e1bce8 15-Oct-2020 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'pinctrl-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
"Core changes:

- NONE whatsoever, we don't even to

Merge tag 'pinctrl-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
"Core changes:

- NONE whatsoever, we don't even touch the core files this time
around.

New drivers:

- New driver for the Toshiba Visconti SoC.

- New subdriver for the Qualcomm MSM8226 SoC.

- New subdriver for the Actions Semiconductor S500 SoC.

- New subdriver for the Mediatek MT8192 SoC.

- New subdriver for the Microchip SAMA7G5 SoC.

Driver enhancements:

- Intel Cherryview and Baytrail cleanups and refactorings.

- Enhanced support for the Renesas R8A7790, more pins and groups.

- Some optimizations for the MCP23S08 MCP23x17 variant.

- Some cleanups around the Actions Semiconductor subdrivers.

- A bunch of cleanups around the SH-PFC and Emma Mobile drivers.

- The "SH-PFC" (literally SuperH pin function controller, I think)
subdirectory is now renamed to the more neutral "renesas", as these
are not very much centered around SuperH anymore.

- Non-critical fixes for the Aspeed driver.

- Non-critical fixes for the Ingenic (MIPS!) driver.

- Fix a bunch of missing pins on the AMD pinctrl driver"

* tag 'pinctrl-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (78 commits)
pinctrl: amd: Add missing pins to the pin group list
dt-bindings: pinctrl: sunxi: Allow pinctrl with more interrupt banks
pinctrl: visconti: PINCTRL_TMPV7700 should depend on ARCH_VISCONTI
pinctrl: mediatek: Free eint data on failure
pinctrl: single: fix debug output when #pinctrl-cells = 2
pinctrl: single: fix pinctrl_spec.args_count bounds check
pinctrl: sunrisepoint: Modify COMMUNITY macros to be consistent
pinctrl: cannonlake: Modify COMMUNITY macros to be consistent
pinctrl: tigerlake: Fix register offsets for TGL-H variant
pinctrl: Document pinctrl-single,pins when #pinctrl-cells = 2
pinctrl: mediatek: use devm_platform_ioremap_resource_byname()
pinctrl: nuvoton: npcm7xx: Constify static ops structs
pinctrl: mediatek: mt7622: add antsel pins/groups
pinctrl: ocelot: simplify the return expression of ocelot_gpiochip_register()
pinctrl: at91-pio4: add support for sama7g5 SoC
dt-bindings: pinctrl: at91-pio4: add microchip,sama7g5
pinctrl: spear: simplify the return expression of tvc_connect()
pinctrl: spear: simplify the return expression of spear310_pinctrl_probe
pinctrl: sprd: use module_platform_driver to simplify the code
pinctrl: Ingenic: Add I2S pins support for Ingenic SoCs.
...

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Revision tags: v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5
# a68a7844 09-Sep-2020 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

pinctrl: visconti: Add Toshiba Visconti SoCs pinctrl support

Add pinctrl support to Toshiba Visconti SoCs.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Punit Agr

pinctrl: visconti: Add Toshiba Visconti SoCs pinctrl support

Add pinctrl support to Toshiba Visconti SoCs.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Link: https://lore.kernel.org/r/20200909204336.2558-3-nobuhiro1.iwamatsu@toshiba.co.jp
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

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