| d9f175b0 | 07-Mar-2023 |
Steen Hegelund <steen.hegelund@microchip.com> |
net: microchip: sparx5: Add port keyset changing functionality
With this its is now possible for clients (like TC) to change the port
keyset configuration in the Sparx5 VCAPs.
This is typically don
net: microchip: sparx5: Add port keyset changing functionality
With this its is now possible for clients (like TC) to change the port
keyset configuration in the Sparx5 VCAPs.
This is typically done per traffic class which is guided with the L3
protocol information.
Before the change the current keyset configuration is collected in a list
that is handed back to the client.
Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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| 52b28a93 | 14-Feb-2023 |
Steen Hegelund <steen.hegelund@microchip.com> |
net: microchip: sparx5: Add TC support for the ES0 VCAP
This enables the TC command to use the Sparx5 ES0 VCAP, and handling of
rule links between IS0 and ES0.
Signed-off-by: Steen Hegelund <steen.
net: microchip: sparx5: Add TC support for the ES0 VCAP
This enables the TC command to use the Sparx5 ES0 VCAP, and handling of
rule links between IS0 and ES0.
Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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| f2a77dd6 | 14-Feb-2023 |
Steen Hegelund <steen.hegelund@microchip.com> |
net: microchip: sparx5: Updated register interface with VCAP ES0 access
This provides access to the ES0 VCAP register targets
Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
Signed-off
net: microchip: sparx5: Updated register interface with VCAP ES0 access
This provides access to the ES0 VCAP register targets
Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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| b5b0c364 | 14-Feb-2023 |
Steen Hegelund <steen.hegelund@microchip.com> |
net: microchip: sparx5: Improve the error handling for linked rules
Ensure that an error is returned if the VCAP instance was not found.
The chain offset (diff) is allowed to be zero as this just me
net: microchip: sparx5: Improve the error handling for linked rules
Ensure that an error is returned if the VCAP instance was not found.
The chain offset (diff) is allowed to be zero as this just means that the
user did not request rules to be linked.
Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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| 38f6408c | 14-Feb-2023 |
Steen Hegelund <steen.hegelund@microchip.com> |
net: microchip: sparx5: Egress VLAN TPID configuration follows IFH
This changes the TPID of the egress frames to use the TPID stored in the
IFH (internal frame header), which ensures that this is th
net: microchip: sparx5: Egress VLAN TPID configuration follows IFH
This changes the TPID of the egress frames to use the TPID stored in the
IFH (internal frame header), which ensures that this is the TPID classified
for the frame at ingress.
Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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| 6ebf182b | 02-Feb-2023 |
Daniel Machon <daniel.machon@microchip.com> |
sparx5: add support for configuring PSFP via tc
Add support for tc actions gate and police, in order to implement
support for configuring PSFP through tc.
Signed-off-by: Daniel Machon <daniel.macho
sparx5: add support for configuring PSFP via tc
Add support for tc actions gate and police, in order to implement
support for configuring PSFP through tc.
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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| e116b19d | 02-Feb-2023 |
Daniel Machon <daniel.machon@microchip.com> |
net: microchip: sparx5: initialize PSFP
Initialize the SDLB's, stream gates and stream filters.
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Reviewed-by: Simon Horman <simon.horman@co
net: microchip: sparx5: initialize PSFP
Initialize the SDLB's, stream gates and stream filters.
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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| ae3e691f | 02-Feb-2023 |
Daniel Machon <daniel.machon@microchip.com> |
net: microchip: sparx5: add support for PSFP stream filters
Add support for configuring PSFP stream filters (IEEE 802.1Q-2018,
8.6.5.1.1).
The VCAP CLM (VCAP IS0 ingress classifier) classifies stre
net: microchip: sparx5: add support for PSFP stream filters
Add support for configuring PSFP stream filters (IEEE 802.1Q-2018,
8.6.5.1.1).
The VCAP CLM (VCAP IS0 ingress classifier) classifies streams,
identified by ISDX (Ingress Service Index, frame metadata), and maps
ISDX to streams.
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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| c70a5e2c | 02-Feb-2023 |
Daniel Machon <daniel.machon@microchip.com> |
net: microchip: sparx5: add support for PSFP stream gates
Add support for configuring PSFP stream gates (IEEE 802.1Q-2018,
8.6.5.1.2).
Stream gates are time-based policers used by PSFP. Frames are
net: microchip: sparx5: add support for PSFP stream gates
Add support for configuring PSFP stream gates (IEEE 802.1Q-2018,
8.6.5.1.2).
Stream gates are time-based policers used by PSFP. Frames are dropped
based on the gate state (OPEN/ CLOSE), whose state will be altered based
on the Gate Control List (GCL) and current PTP time. Apart from
time-based policing, stream gates can alter egress queue selection for
the frames that pass through the Gate. This is done through Internal
Priority Selector (IPS). Stream gates are mapped from stream filters.
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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| 9e02131e | 02-Feb-2023 |
Daniel Machon <daniel.machon@microchip.com> |
net: microchip: sparx5: add function for calculating PTP basetime
Add a new function for calculating PTP basetime, required by the stream
gate scheduler to calculate gate state (open / close).
Sign
net: microchip: sparx5: add function for calculating PTP basetime
Add a new function for calculating PTP basetime, required by the stream
gate scheduler to calculate gate state (open / close).
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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| d2185e79 | 02-Feb-2023 |
Daniel Machon <daniel.machon@microchip.com> |
net: microchip: sparx5: add support for PSFP flow-meters
Add support for configuring PSFP flow-meters (IEEE 802.1Q-2018,
8.6.5.1.3).
The VCAP CLM (VCAP IS0 ingress classifier) classifies streams,
i
net: microchip: sparx5: add support for PSFP flow-meters
Add support for configuring PSFP flow-meters (IEEE 802.1Q-2018,
8.6.5.1.3).
The VCAP CLM (VCAP IS0 ingress classifier) classifies streams,
identified by ISDX (Ingress Service Index, frame metadata), and maps
ISDX to flow-meters. SDLB's provide the flow-meter parameters.
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
show more ...
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| 1db82abf | 02-Feb-2023 |
Daniel Machon <daniel.machon@microchip.com> |
net: microchip: sparx5: add support for service policers
Add initial API for configuring policers. This patch add support for
service policers.
Signed-off-by: Daniel Machon <daniel.machon@microchip
net: microchip: sparx5: add support for service policers
Add initial API for configuring policers. This patch add support for
service policers.
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
show more ...
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| 9bf50889 | 02-Feb-2023 |
Daniel Machon <daniel.machon@microchip.com> |
net: microchip: sparx5: add support for Service Dual Leacky Buckets
Add support for Service Dual Leacky Buckets (SDLB), used to implement
PSFP flow-meters. Buckets are linked together in a leak chai
net: microchip: sparx5: add support for Service Dual Leacky Buckets
Add support for Service Dual Leacky Buckets (SDLB), used to implement
PSFP flow-meters. Buckets are linked together in a leak chain of a leak
group. Leak groups a preconfigured to serve buckets within a certain
rate interval.
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
show more ...
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| bb535c0d | 02-Feb-2023 |
Daniel Machon <daniel.machon@microchip.com> |
net: microchip: sparx5: add resource pools
Add resource pools and accessor functions. These pools can be queried by
the driver, whenever a finite resource is required. Some resources can
be reused,
net: microchip: sparx5: add resource pools
Add resource pools and accessor functions. These pools can be queried by
the driver, whenever a finite resource is required. Some resources can
be reused, in which case an index and a reference count is used to keep
track of users.
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
show more ...
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