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5ee2d63c |
| 28-Aug-2024 |
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> |
drm/xe/gsc: Add debugfs to print GSC info
This is useful for debug, in case something goes wrong with the GSC. The info includes the version information and the current value of the HECI1 status reg
drm/xe/gsc: Add debugfs to print GSC info
This is useful for debug, in case something goes wrong with the GSC. The info includes the version information and the current value of the HECI1 status registers.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240828215158.2743994-5-daniele.ceraolospurio@intel.com
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f7c2ea68 |
| 28-Aug-2024 |
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> |
drm/xe/gsc: Track the platform in the compatibility version
The GSC compatibility version number is reset for each new platform. To indicate this, the version includes a number that identifies the p
drm/xe/gsc: Track the platform in the compatibility version
The GSC compatibility version number is reset for each new platform. To indicate this, the version includes a number that identifies the platform (102 = MTL, 104 = LNL); this matches what happens for the release version, where the major number also identifies a platform.
To make it clearer in our logs that the compatibility version is specific to the platform, it is useful to include this platform number. However, given that our binary names already include the platform, it is not necessary to add this extra number there.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240828215158.2743994-4-daniele.ceraolospurio@intel.com
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7293859c |
| 28-Aug-2024 |
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> |
drm/xe/gsc: Fix FW status if the firmware is already loaded
We set the FW status to "TRANSFERRED" after the load completes and to "RUNNING"once we're done with proxy init, so do the same if we're tr
drm/xe/gsc: Fix FW status if the firmware is already loaded
We set the FW status to "TRANSFERRED" after the load completes and to "RUNNING"once we're done with proxy init, so do the same if we're trying to re-load the FW and it is already loaded.
Note that there is no difference in driver behavior between the 2 states, but it's useful to be accurate when we dump the status for debug.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240828215158.2743994-3-daniele.ceraolospurio@intel.com
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2160f6f6 |
| 28-Aug-2024 |
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> |
drm/xe/gsc: Do not attempt to load the GSC multiple times
The GSC HW is only reset by driver FLR or D3cold entry. We don't support the former at runtime, while the latter is only supported on DGFX,
drm/xe/gsc: Do not attempt to load the GSC multiple times
The GSC HW is only reset by driver FLR or D3cold entry. We don't support the former at runtime, while the latter is only supported on DGFX, for which we don't support GSC. Therefore, if GSC failed to load previously there is no need to try again because the HW is stuck in the error state.
An assert has been added so that if we ever add DGFX support we'll know we need to handle the D3 case.
v2: use "< 0" instead of "!= 0" in the FW state error check (Julia).
Fixes: dd0e89e5edc2 ("drm/xe/gsc: GSC FW load") Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Cc: <stable@vger.kernel.org> # v6.8+ Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240828215158.2743994-2-daniele.ceraolospurio@intel.com
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04cf420b |
| 27-Aug-2024 |
Rodrigo Vivi <rodrigo.vivi@intel.com> |
Merge drm/drm-next into drm-intel-next
Need to take some Xe bo definition in here before we can add the BMG display 64k aligned size restrictions.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.co
Merge drm/drm-next into drm-intel-next
Need to take some Xe bo definition in here before we can add the BMG display 64k aligned size restrictions.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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4461e9e5 |
| 27-Aug-2024 |
Daniel Vetter <daniel.vetter@ffwll.ch> |
Merge v6.11-rc5 into drm-next
amdgpu pr conconflicts due to patches cherry-picked to -fixes, I might as well catch up with a backmerge and handle them all. Plus both misc and intel maintainers asked
Merge v6.11-rc5 into drm-next
amdgpu pr conconflicts due to patches cherry-picked to -fixes, I might as well catch up with a backmerge and handle them all. Plus both misc and intel maintainers asked for a backmerge anyway.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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5a891a0e |
| 16-Aug-2024 |
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> |
drm/xe/uc: Use devm to register cleanup that includes exec_queues
Exec_queue cleanup requires HW access, so we need to use devm instead of drmm for it.
Signed-off-by: Daniele Ceraolo Spurio <daniel
drm/xe/uc: Use devm to register cleanup that includes exec_queues
Exec_queue cleanup requires HW access, so we need to use devm instead of drmm for it.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240815230541.3828206-2-lucas.demarchi@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
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2e5d47fe |
| 16-Aug-2024 |
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> |
drm/xe/uc: Use managed bo for HuC and GSC objects
Drmm actions are not the right ones to clean up BOs and we should use devm instead. However, we can also instead just allocate the objects using the
drm/xe/uc: Use managed bo for HuC and GSC objects
Drmm actions are not the right ones to clean up BOs and we should use devm instead. However, we can also instead just allocate the objects using the managed_bo function, which will internally register the correct cleanup call and therefore allows us to simplify the code.
While at it, switch to drmm_kzalloc for the GSC proxy allocation to further simplify the cleanup.
Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240815230541.3828206-1-lucas.demarchi@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
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e422c0bf |
| 08-Aug-2024 |
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> |
drm/xe: fix WA 14018094691
This WA is applied while initializing the media GT, but it a primary GT WA (because it modifies a register on the primary GT), so the XE_WA macro is returning false even w
drm/xe: fix WA 14018094691
This WA is applied while initializing the media GT, but it a primary GT WA (because it modifies a register on the primary GT), so the XE_WA macro is returning false even when the WA should be applied. Fix this by using the primary GT in the macro.
Note that this WA only applies to PXP and we don't yet support that in Xe, so there are no negative effects to this bug, which is why we didn't see any errors in testing.
v2: use the primary GT in the macro instead of marking the WA as platform-wide (Lucas, Matt).
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240807235333.1370915-1-daniele.ceraolospurio@intel.com
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3663e2c4 |
| 01-Aug-2024 |
Jani Nikula <jani.nikula@intel.com> |
Merge drm/drm-next into drm-intel-next
Sync with v6.11-rc1 in general, and specifically get the new BACKLIGHT_POWER_ constants for power states.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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0e8655b4 |
| 29-Jul-2024 |
Thomas Zimmermann <tzimmermann@suse.de> |
Merge drm/drm-next into drm-misc-next
Backmerging to get a late RC of v6.10 before moving into v6.11.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
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95c13662 |
| 05-Sep-2024 |
Ingo Molnar <mingo@kernel.org> |
Merge branch 'perf/urgent' into perf/core, to pick up fixes
This also refreshes the -rc1 based branch to -rc5.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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f10d5208 |
| 12-Sep-2024 |
Mark Brown <broonie@kernel.org> |
spi: Merge up fixes
A patch for Qualcomm depends on some fixes.
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2f7eedca |
| 10-Sep-2024 |
Thomas Gleixner <tglx@linutronix.de> |
Merge branch 'linus' into timers/core
To update with the latest fixes.
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d224338a |
| 05-Sep-2024 |
Jonathan Corbet <corbet@lwn.net> |
Merge tag 'v6.11-rc6' into docs-mw
This is done primarily to get a docs build fix merged via another tree so that "make htmldocs" stops failing.
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eb876ea7 |
| 04-Sep-2024 |
Thomas Gleixner <tglx@linutronix.de> |
Merge branch 'linus' into smp/core
Pull in upstream changes so further patches don't conflict.
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4436e6da |
| 02-Aug-2024 |
Thomas Gleixner <tglx@linutronix.de> |
Merge branch 'linus' into x86/mm
Bring x86 and selftests up to date
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#
1a371190 |
| 14-Sep-2024 |
Paolo Bonzini <pbonzini@redhat.com> |
Merge tag 'loongarch-kvm-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson into HEAD
LoongArch KVM changes for v6.12
1. Revert qspinlock to test-and-set simple lock o
Merge tag 'loongarch-kvm-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson into HEAD
LoongArch KVM changes for v6.12
1. Revert qspinlock to test-and-set simple lock on VM. 2. Add Loongson Binary Translation extension support. 3. Add PMU support for guest. 4. Enable paravirt feature control from VMM. 5. Implement function kvm_para_has_feature().
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091b2eca |
| 14-Sep-2024 |
Paolo Bonzini <pbonzini@redhat.com> |
Merge tag 'kvmarm-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 updates for 6.12
* New features:
- Add a Stage-2 page table dumper, reusing the main pt
Merge tag 'kvmarm-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 updates for 6.12
* New features:
- Add a Stage-2 page table dumper, reusing the main ptdump infrastructure, and allowing easier debugging of the our page-table infrastructure
- Add FP8 support to the KVM/arm64 floating point handling.
- Add NV support for the AT family of instructions, which mostly results in adding a page table walker that deals with most of the complexity of the architecture.
* Improvements, fixes and cleanups:
- Add selftest checks for a bunch of timer emulation corner cases
- Fix the multiple of cases where KVM/arm64 doesn't correctly handle the guest trying to use a GICv3 that isn't advertised
- Remove REG_HIDDEN_USER from the sysreg infrastructure, making things little more simple
- Prevent MTE tags being restored by userspace if we are actively logging writes, as that's a recipe for disaster
- Correct the refcount on a page that is not considered for MTE tag copying (such as a device)
- Relax the synchronisation when walking a page table to split block mappings, moving it at the end the walk, as there is no need to perform it on every store.
- Fix boundary check when transfering memory using FFA
- Fix pKVM TLB invalidation, only affecting currently out of tree code but worth addressing for peace of mind
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46ae4d0a |
| 06-Sep-2024 |
Jakub Kicinski <kuba@kernel.org> |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR.
No conflicts (sort of) and no adjacent changes.
This merge reverts commit b3c9e65eb
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR.
No conflicts (sort of) and no adjacent changes.
This merge reverts commit b3c9e65eb227 ("net: hsr: remove seqnr_lock") from net, as it was superseded by commit 430d67bdcb04 ("net: hsr: Use the seqnr lock for frames received via interlink port.") in net-next.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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3cbd2090 |
| 08-Aug-2024 |
Jakub Kicinski <kuba@kernel.org> |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR.
Conflicts:
drivers/net/ethernet/faraday/ftgmac100.c 4186c8d9e6af ("net: ftgmac100
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR.
Conflicts:
drivers/net/ethernet/faraday/ftgmac100.c 4186c8d9e6af ("net: ftgmac100: Ensure tx descriptor updates are visible") e24a6c874601 ("net: ftgmac100: Get link speed and duplex for NC-SI") https://lore.kernel.org/0b851ec5-f91d-4dd3-99da-e81b98c9ed28@kernel.org
net/ipv4/tcp.c bac76cf89816 ("tcp: fix forever orphan socket caused by tcp_abort") edefba66d929 ("tcp: rstreason: introduce SK_RST_REASON_TCP_STATE for active reset") https://lore.kernel.org/20240828112207.5c199d41@canb.auug.org.au
No adjacent changes.
Link: https://patch.msgid.link/20240829130829.39148-1-pabeni@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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342123d6 |
| 02-Sep-2024 |
Thomas Gleixner <tglx@linutronix.de> |
Merge tag 'timers-v6.11-rc7' of https://git.linaro.org/people/daniel.lezcano/linux into timers/urgent
Pull clocksource driver fixes from Daniel Lezcano:
- Remove percpu irq related code in the ti
Merge tag 'timers-v6.11-rc7' of https://git.linaro.org/people/daniel.lezcano/linux into timers/urgent
Pull clocksource driver fixes from Daniel Lezcano:
- Remove percpu irq related code in the timer-of initialization routine as it is broken but also unused (Daniel Lezcano)
- Fix return -ETIME when delta exceeds INT_MAX and the next event not taking effect sometimes (Jacky Bai)
Link: https://lore.kernel.org/all/d0e93dbd-b796-4726-b38c-089b685591c9@linaro.org
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ea462f0f |
| 06-Sep-2024 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'drm-fixes-2024-09-06' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie: "This has a fair few patches in it, but I reviewed them all and they seem like real
Merge tag 'drm-fixes-2024-09-06' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie: "This has a fair few patches in it, but I reviewed them all and they seem like real things, amdgpu, i915 and xe each have a bunch of fixes for various things, then there is a some bridge suspend/resume ordering fixes for a recent rework, and then some single driver changes in a few others.
Nothing looks too serious, hopefully next week is quiet.
amdgpu: - IPS workaround - Fix compatibility with older MES firmware - Fix CPU spikes when clearing VRAM - Backlight fix - PMO fix - Revert SWSMU change to fix regression
xe: - GSC loading fix - PCODE mutex fix - Suspend/Resume fixes - RPM fixes
i915: - Do not attempt to load the GSC multiple times - Fix readout degamma_lut mismatch on ilk/snb - Mark debug_fence_init_onstack() with __maybe_unused - fence: Mark debug_fence_free() with __maybe_unused - display: Add mechanism to use sink model when applying quirk - display: Increase Fast Wake Sync length as a quirk
komeda: - zpos normalization fix
nouveau: - incorrect register fix
imagination: - memory leak fix
bridge: - hdmi/bridge rework fixes
panthor: - cache coherency fix - hi priority access fix
panel: - change of compatible string
fbdev: - deferred-io init with no struct page fix"
* tag 'drm-fixes-2024-09-06' of https://gitlab.freedesktop.org/drm/kernel: (29 commits) Revert "drm/amdgpu: align pp_power_profile_mode with kernel docs" drm/fbdev-dma: Only install deferred I/O if necessary drm/panthor: flush FW AS caches in slow reset path drm: panel: nv3052c: Correct WL-355608-A8 panel compatible dt-bindings: display: panel: Rename WL-355608-A8 panel to rg35xx-*-panel drm/panthor: Restrict high priorities on group_create drm/xe/display: Avoid encoder_suspend at runtime suspend drm/xe: Suspend/resume user access only during system s/r drm/xe/display: Match i915 driver suspend/resume sequences better drm/xe: Add missing runtime reference to wedged upon gt_reset drm/xe/pcode: Treat pcode as per-tile rather than per-GT drm/xe/gsc: Do not attempt to load the GSC multiple times drm/bridge-connector: reset the HDMI connector state drm/bridge-connector: move to DRM_DISPLAY_HELPER module drm/display: stop depending on DRM_DISPLAY_HELPER drm/i915/display: Increase Fast Wake Sync length as a quirk drm/i915/display: Add mechanism to use sink model when applying quirk drm/amd/display: Block timing sync for different signals in PMO drm/amd/display: Lock DC and exit IPS when changing backlight drm/amdgpu: always allocate cleared VRAM for GEM allocations ...
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4de4a0f1 |
| 06-Sep-2024 |
Dave Airlie <airlied@redhat.com> |
Merge tag 'drm-xe-fixes-2024-09-05' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes
- GSC loading fix (Daniele) - PCODE mutex fix (Matt) - Suspend/Resume fixes (Maarten, Imre) - RPM f
Merge tag 'drm-xe-fixes-2024-09-05' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes
- GSC loading fix (Daniele) - PCODE mutex fix (Matt) - Suspend/Resume fixes (Maarten, Imre) - RPM fixes (Rodrigo)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZtmyFvDfFLPbuf6A@intel.com
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529bf8d1 |
| 28-Aug-2024 |
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> |
drm/xe/gsc: Do not attempt to load the GSC multiple times
The GSC HW is only reset by driver FLR or D3cold entry. We don't support the former at runtime, while the latter is only supported on DGFX,
drm/xe/gsc: Do not attempt to load the GSC multiple times
The GSC HW is only reset by driver FLR or D3cold entry. We don't support the former at runtime, while the latter is only supported on DGFX, for which we don't support GSC. Therefore, if GSC failed to load previously there is no need to try again because the HW is stuck in the error state.
An assert has been added so that if we ever add DGFX support we'll know we need to handle the D3 case.
v2: use "< 0" instead of "!= 0" in the FW state error check (Julia).
Fixes: dd0e89e5edc2 ("drm/xe/gsc: GSC FW load") Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Cc: <stable@vger.kernel.org> # v6.8+ Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240828215158.2743994-2-daniele.ceraolospurio@intel.com (cherry picked from commit 2160f6f6e3cf6893a83357c3b82ff8589bdc0f08) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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