Revision tags: v6.7 |
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811fe9f5 |
| 04-Jan-2024 |
Michal Wajdeczko <michal.wajdeczko@intel.com> |
drm/xe/guc: Introduce Relay Communication for SR-IOV
There are scenarios where SR-IOV Virtual Function (VF) driver will need to get additional data that is not available over VF MMIO BAR nor could b
drm/xe/guc: Introduce Relay Communication for SR-IOV
There are scenarios where SR-IOV Virtual Function (VF) driver will need to get additional data that is not available over VF MMIO BAR nor could be queried from the GuC firmware and must be obtained from the Physical Function (PF) driver.
To allow such communication between VF and PF drivers, GuC supports set of H2G and G2H actions which allows relaying embedded messages, that are otherwise opaque for the GuC.
To allow use of this communication mechanism, provide functions for sending requests and handling replies and placeholder where we will put handlers for incoming requests.
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Link: https://lore.kernel.org/r/20240104222031.277-8-michal.wajdeczko@intel.com Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
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Revision tags: v6.7-rc8, v6.7-rc7 |
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5095d13d |
| 18-Dec-2023 |
Michal Wajdeczko <michal.wajdeczko@intel.com> |
drm/xe/kunit: Define helper functions to allocate fake xe device
There will be more KUnit tests added that will require fake device. Define generic helper functions to avoid code duplications.
Cc:
drm/xe/kunit: Define helper functions to allocate fake xe device
There will be more KUnit tests added that will require fake device. Define generic helper functions to avoid code duplications.
Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://lore.kernel.org/r/20231218190629.502-6-michal.wajdeczko@intel.com Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
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587c7334 |
| 18-Dec-2023 |
Michal Wajdeczko <michal.wajdeczko@intel.com> |
drm/xe: Introduce GuC Doorbells Manager
The GFX doorbell solution provides a mechanism for submission of workload to the graphics hardware by a ring3 application without the penalty of ring transiti
drm/xe: Introduce GuC Doorbells Manager
The GFX doorbell solution provides a mechanism for submission of workload to the graphics hardware by a ring3 application without the penalty of ring transition for each workload submission.
This feature is not currently used by the Linux drivers, but in SR-IOV mode the doorbells are treated as shared resource and the PF driver must be able to provision exclusive range of doorbells IDs across all enabled VFs.
Introduce simple GuC doorbell ID manager that will be used by the PF driver for VFs provisioning and can later be used by submission code once we are ready to switch from H2G based notifications to doorbells mechanism.
Cc: Matthew Brost <matthew.brost@intel.com> Cc: Piotr Piórkowski <piotr.piorkowski@intel.com> Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Link: https://lore.kernel.org/r/20231218190629.502-4-michal.wajdeczko@intel.com Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
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a6581ebe |
| 18-Dec-2023 |
Michal Wajdeczko <michal.wajdeczko@intel.com> |
drm/xe/vf: Introduce Memory Based Interrupts Handler
The register based interrupts infrastructure does not scale efficiently to allow delivering interrupts to a large number of virtual machines. Mem
drm/xe/vf: Introduce Memory Based Interrupts Handler
The register based interrupts infrastructure does not scale efficiently to allow delivering interrupts to a large number of virtual machines. Memory based interrupt reporting provides an efficient and scalable infrastructure.
Define handler to read and dispatch memory based interrupts. We will use this handler in upcoming patch.
Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://lore.kernel.org/r/20231214185955.1791-8-michal.wajdeczko@intel.com Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
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03c11eb3 |
| 14-Feb-2024 |
Ingo Molnar <mingo@kernel.org> |
Merge tag 'v6.8-rc4' into x86/percpu, to resolve conflicts and refresh the branch
Conflicts: arch/x86/include/asm/percpu.h arch/x86/include/asm/text-patching.h
Signed-off-by: Ingo Molnar <mingo@k
Merge tag 'v6.8-rc4' into x86/percpu, to resolve conflicts and refresh the branch
Conflicts: arch/x86/include/asm/percpu.h arch/x86/include/asm/text-patching.h
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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42ac0be1 |
| 26-Jan-2024 |
Ingo Molnar <mingo@kernel.org> |
Merge branch 'linus' into x86/mm, to refresh the branch and pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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06f609b3 |
| 25-Jan-2024 |
Jakub Kicinski <kuba@kernel.org> |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR.
No conflicts or adjacent changes.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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f0b7a0d1 |
| 23-Jan-2024 |
Andrew Morton <akpm@linux-foundation.org> |
Merge branch 'master' into mm-hotfixes-stable
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fe33c0fb |
| 17-Jan-2024 |
Andrew Morton <akpm@linux-foundation.org> |
Merge branch 'master' into mm-hotfixes-stable
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cf79f291 |
| 22-Jan-2024 |
Maxime Ripard <mripard@kernel.org> |
Merge v6.8-rc1 into drm-misc-fixes
Let's kickstart the 6.8 fix cycle.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
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e08b5758 |
| 19-Jan-2024 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'drm-next-2024-01-19' of git://anongit.freedesktop.org/drm/drm
Pull more drm fixes from Dave Airlie: "This is mostly amdgpu and xe fixes, with an amdkfd and nouveau fix thrown in.
Th
Merge tag 'drm-next-2024-01-19' of git://anongit.freedesktop.org/drm/drm
Pull more drm fixes from Dave Airlie: "This is mostly amdgpu and xe fixes, with an amdkfd and nouveau fix thrown in.
The amdgpu ones are just the usual couple of weeks of fixes. The xe ones are bunch of cleanups for the new xe driver, the fix you put in on the merge commit and the kconfig fix that was hiding the problem from me.
amdgpu: - DSC fixes - DC resource pool fixes - OTG fix - DML2 fixes - Aux fix - GFX10 RLC firmware handling fix - Revert a broken workaround for SMU 13.0.2 - DC writeback fix - Enable gfxoff when ROCm apps are active on gfx11 with the proper FW version
amdkfd: - Fix dma-buf exports using GEM handles
nouveau: - fix a unneeded WARN_ON triggering
xe: - Fix for definition of wakeref_t - Fix for an error code aliasing - Fix for VM_UNBIND_ALL in the case there are no bound VMAs - Fixes for a number of __iomem address space mismatches reported by sparse - Fixes for the assignment of exec_queue priority - A Fix for skip_guc_pc not taking effect - Workaround for a build problem on GCC 11 - A couple of fixes for error paths - Fix a Flat CCS compression metadata copy issue - Fix a misplace array bounds checking - Don't have display support depend on EXPERT (as discussed on IRC)"
* tag 'drm-next-2024-01-19' of git://anongit.freedesktop.org/drm/drm: (71 commits) nouveau/vmm: don't set addr on the fail path to avoid warning drm/amdgpu: Enable GFXOFF for Compute on GFX11 drm/amd/display: Drop 'acrtc' and add 'new_crtc_state' NULL check for writeback requests. drm/amdgpu: revert "Adjust removal control flow for smu v13_0_2" drm/amdkfd: init drm_client with funcs hook drm/amd/display: Fix a switch statement in populate_dml_output_cfg_from_stream_state() drm/amdgpu: Fix the null pointer when load rlc firmware drm/amd/display: Align the returned error code with legacy DP drm/amd/display: Fix DML2 watermark calculation drm/amd/display: Clear OPTC mem select on disable drm/amd/display: Port DENTIST hang and TDR fixes to OTG disable W/A drm/amd/display: Add logging resource checks drm/amd/display: Init link enc resources in dc_state only if res_pool presents drm/amd/display: Fix late derefrence 'dsc' check in 'link_set_dsc_pps_packet()' drm/amd/display: Avoid enum conversion warning drm/amd/pm: Fix smuv13.0.6 current clock reporting drm/amd/pm: Add error log for smu v13.0.6 reset drm/amdkfd: Fix 'node' NULL check in 'svm_range_get_range_boundaries()' drm/amdgpu: drop exp hw support check for GC 9.4.3 drm/amdgpu: move debug options init prior to amdgpu device init ...
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009f0a64 |
| 19-Jan-2024 |
Dave Airlie <airlied@redhat.com> |
Merge tag 'drm-xe-next-fixes-2024-01-16' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next
Driver Changes: - Fix for definition of wakeref_t - Fix for an error code aliasing - Fix for VM
Merge tag 'drm-xe-next-fixes-2024-01-16' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next
Driver Changes: - Fix for definition of wakeref_t - Fix for an error code aliasing - Fix for VM_UNBIND_ALL in the case there are no bound VMAs - Fixes for a number of __iomem address space mismatches reported by sparse - Fixes for the assignment of exec_queue priority - A Fix for skip_guc_pc not taking effect - Workaround for a build problem on GCC 11 - A couple of fixes for error paths - Fix a Flat CCS compression metadata copy issue - Fix a misplace array bounds checking - Don't have display support depend on EXPERT (as discussed on IRC)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= <thomas.hellstrom@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240116102204.106520-1-thomas.hellstrom@linux.intel.com
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190db3b1 |
| 10-Jan-2024 |
Paul E. McKenney <paulmck@kernel.org> |
drm/xe: Fix build bug for GCC 11
Building drivers/gpu/drm/xe/xe_gt_pagefault.c with GCC 11 results in the following build errors:
./include/linux/fortify-string.h:57:33: error: writing 16 bytes int
drm/xe: Fix build bug for GCC 11
Building drivers/gpu/drm/xe/xe_gt_pagefault.c with GCC 11 results in the following build errors:
./include/linux/fortify-string.h:57:33: error: writing 16 bytes into a region of size 0 [-Werror=stringop-overflow=] 57 | #define __underlying_memcpy __builtin_memcpy | ^ ./include/linux/fortify-string.h:644:9: note: in expansion of macro ‘__underlying_memcpy’ 644 | __underlying_##op(p, q, __fortify_size); \ | ^~~~~~~~~~~~~ ./include/linux/fortify-string.h:689:26: note: in expansion of macro ‘__fortify_memcpy_chk’ 689 | #define memcpy(p, q, s) __fortify_memcpy_chk(p, q, s, \ | ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/xe/xe_gt_pagefault.c:340:17: note: in expansion of macro ‘memcpy’ 340 | memcpy(pf_queue->data + pf_queue->tail, msg, len * sizeof(u32)); | ^~~~~~ In file included from drivers/gpu/drm/xe/xe_device_types.h:17, from drivers/gpu/drm/xe/xe_vm_types.h:16, from drivers/gpu/drm/xe/xe_bo.h:13, from drivers/gpu/drm/xe/xe_gt_pagefault.c:16: drivers/gpu/drm/xe/xe_gt_types.h:102:25: note: at offset [1144, 265324] into destination object ‘tile’ of size 8 102 | struct xe_tile *tile; | ^~~~
Fix these by removing -Wstringop-overflow from drm/xe builds.
Closes: https://lore.kernel.org/all/45ad1d0f-a10f-483e-848a-76a30252edbe@paulmck-laptop/ Fixes: 7a8bc11782d3 ("drm/xe: Enable W=1 warnings by default") Suggested-by: Stephen Rothwell <sfr@rothwell.id.au> Signed-off-by: Paul E. McKenney <paulmck@kernel.org> [ This particular warning is broken on GCC11. In future changes it will be moved to the normal C flags in the top level Makefile (out of Makefile.extrawarn), but accounting for the compiler support. Just remove it out of xe's forced extra warnings for now ] Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> (cherry picked from commit a109d19992294736abd4f4232ea639e03eb1f9e7) Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
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cf65598d |
| 12-Jan-2024 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm
Pull drm updates from Dave Airlie: "This contains two major new drivers:
- imagination is a first driver for Imagination
Merge tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm
Pull drm updates from Dave Airlie: "This contains two major new drivers:
- imagination is a first driver for Imagination Technologies devices, it only covers very specific devices, but there is hope to grow it
- xe is a reboot of the i915 GPU (shares display) side using a more upstream focused development model, and trying to maximise code sharing. It's not enabled for any hw by default, and will hopefully get switched on for Intel's Lunarlake.
This also drops a bunch of the old UMS ioctls. It's been dead long enough.
amdgpu has a bunch of new color management code that is being used in the Steam Deck.
amdgpu also has a new ACPI WBRF interaction to help avoid radio interference.
Otherwise it's the usual lots of changes in lots of places.
Detailed summary:
new drivers: - imagination - new driver for Imagination Technologies GPU - xe - new driver for Intel GPUs using core drm concepts
core: - add CLOSE_FB ioctl - remove old UMS ioctls - increase max objects to accomodate AMD color mgmt
encoder: - create per-encoder debugfs directory
edid: - split out drm_eld - SAD helpers - drop edid_firmware module parameter
format-helper: - cache format conversion buffers
sched: - move from kthread to workqueue - rename some internals - implement dynamic job-flow control
gpuvm: - provide more features to handle GEM objects
client: - don't acquire module reference
displayport: - add mst path property documentation
fdinfo: - alignment fix
dma-buf: - add fence timestamp helper - add fence deadline support
bridge: - transparent aux-bridge for DP/USB-C - lt8912b: add suspend/resume support and power regulator support
panel: - edp: AUO B116XTN02, BOE NT116WHM-N21,836X2, NV116WHM-N49 - chromebook panel support - elida-kd35t133: rework pm - powkiddy RK2023 panel - himax-hx8394: drop prepare/unprepare and shutdown logic - BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G - Evervision VGG644804, SDC ATNA45AF01 - nv3052c: register docs, init sequence fixes, fascontek FS035VG158 - st7701: Anbernic RG-ARC support - r63353 panel controller - Ilitek ILI9805 panel controller - AUO G156HAN04.0
simplefb: - support memory regions - support power domains
amdgpu: - add new 64-bit sequence number infrastructure - add AMD specific color management - ACPI WBRF support for RF interference handling - GPUVM updates - RAS updates - DCN 3.5 updates - Rework PCIe link speed handling - Document GPU reset types - DMUB fixes - eDP fixes - NBIO 7.9/7.11 updates - SubVP updates - XGMI PCIe state dumping for aqua vanjaram - GFX11 golden register updates - enable tunnelling on high pri compute
amdkfd: - Migrate TLB flushing logic to amdgpu - Trap handler fixes - Fix restore workers handling on suspend/resume - Fix possible memory leak in pqm_uninit() - support import/export of dma-bufs using GEM handles
radeon: - fix possible overflows in command buffer checking - check for errors in ring_lock
i915: - reorg display code for reuse in xe driver - fdinfo memory stats printing - DP MST bandwidth mgmt improvements - DP panel replay enabling - MTL C20 phy state verification - MTL DP DSC fractional bpp support - Audio fastset support - use dma_fence interfaces instead of i915_sw_fence - Separate gem and display code - AUX register macro refactoring - Separate display module/device parameters - Move display capabilities debugfs under display - Makefile cleanups - Register cleanups - Move display lock inits under display/ - VLV/CHV DPIO PHY register and interface refactoring - DSI VBT sequence refactoring - C10/C20 PHY PLL hardware readout - DPLL code cleanups - Cleanup PXP plane protection checks - Improve display debug msgs - PSR selective fetch fixes/improvements - DP MST fixes - Xe2LPD FBC restrictions removed - DGFX uses direct VBT pin mapping - more MTL WAs - fix MTL eDP bug - eliminate use of kmap_atomic
habanalabs: - sysfs entry to identify a device minor id with debugfs path - sysfs entry to expose device module id - add signed device info retrieval through INFO ioctl - add Gaudi2C device support - pcie reset prepare/done hooks
msm: - Add support for SDM670, SM8650 - Handle the CFG interconnect to fix the obscure hangs / timeouts - Kconfig fix for QMP dependency - use managed allocators - DPU: SDM670, SM8650 support - DPU: Enable SmartDMA on SM8350 and SM8450 - DP: enable runtime PM support - GPU: add metadata UAPI - GPU: move devcoredumps to GPU device - GPU: convert to drm_exec
ivpu: - update FW API - new debugfs file - a new NOP job submission test mode - improve suspend/resume - PM improvements - MMU PT optimizations - firmware profile frequency support - support for uncached buffers - switch to gem shmem helpers - replace kthread with threaded irqs
rockchip: - rk3066_hdmi: convert to atomic - vop2: support nv20 and nv30 - rk3588 support
mediatek: - use devm_platform_ioremap_resource - stop using iommu_present - MT8188 VDOSYS1 display support
panfrost: - PM improvements - improve interrupt handling as poweroff
qaic: - allow to run with single MSI - support host/device time sync - switch to persistent DRM devices
exynos: - fix potential error pointer dereference - fix wrong error checking - add missing call to drm_atomic_helper_shutdown
omapdrm: - dma-fence lockdep annotation fix
tidss: - dma-fence lockdep annotation fix - support for AM62A7
v3d: - BCM2712 - rpi5 support - fdinfo + gputop support - uapi for CPU job handling
virtio-gpu: - add context debug name"
* tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm: (2340 commits) drm/amd/display: Allow z8/z10 from driver drm/amd/display: fix bandwidth validation failure on DCN 2.1 drm/amdgpu: apply the RV2 system aperture fix to RN/CZN as well drm/amd/display: Move fixpt_from_s3132 to amdgpu_dm drm/amd/display: Fix recent checkpatch errors in amdgpu_dm Revert "drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole" drm/amd/display: avoid stringop-overflow warnings for dp_decide_lane_settings() drm/amd/display: Fix power_helpers.c codestyle drm/amd/display: Fix hdcp_log.h codestyle drm/amd/display: Fix hdcp2_execution.c codestyle drm/amd/display: Fix hdcp_psp.h codestyle drm/amd/display: Fix freesync.c codestyle drm/amd/display: Fix hdcp_psp.c codestyle drm/amd/display: Fix hdcp1_execution.c codestyle drm/amd/pm/smu7: fix a memleak in smu7_hwmgr_backend_init drm/amdkfd: Fix iterator used outside loop in 'kfd_add_peer_prop()' drm/amdgpu: Drop 'fence' check in 'to_amdgpu_amdkfd_fence()' drm/amdkfd: Confirm list is non-empty before utilizing list_first_entry in kfd_topology.c drm/amdgpu: Fix '*fw' from request_firmware() not released in 'amdgpu_ucode_request()' drm/amdgpu: Fix variable 'mca_funcs' dereferenced before NULL check in 'amdgpu_mca_smu_get_mca_entry()' ...
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d2197029 |
| 21-Dec-2023 |
Dave Airlie <airlied@redhat.com> |
Merge tag 'drm-xe-next-2023-12-21-pr1-1' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next
Introduce a new DRM driver for Intel GPUs
Xe, is a new driver for Intel GPUs that supports bot
Merge tag 'drm-xe-next-2023-12-21-pr1-1' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next
Introduce a new DRM driver for Intel GPUs
Xe, is a new driver for Intel GPUs that supports both integrated and discrete platforms. The experimental support starts with Tiger Lake. i915 will continue be the main production driver for the platforms up to Meteor Lake and Alchemist. Then the goal is to make this Intel Xe driver the primary driver for Lunar Lake and newer platforms.
It uses most, if not all, of the key drm concepts, in special: TTM, drm-scheduler, drm-exec, drm-gpuvm/gpuva and others.
Signed-off-by: Dave Airlie <airlied@redhat.com>
[airlied: add an extra X86 check, fix a typo, fix drm_exec_init interface change].
From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZYSwLgXZUZ57qGPQ@intel.com
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Revision tags: v6.7-rc6 |
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90a8b23f |
| 15-Dec-2023 |
Ashutosh Dixit <ashutosh.dixit@intel.com> |
drm/xe/pmu: Remove PMU from Xe till uapi is finalized
PMU uapi is likely to change in the future. Till the uapi is finalized, remove PMU from Xe. PMU can be re-added after uapi is finalized.
v2: In
drm/xe/pmu: Remove PMU from Xe till uapi is finalized
PMU uapi is likely to change in the future. Till the uapi is finalized, remove PMU from Xe. PMU can be re-added after uapi is finalized.
v2: Include xe_drm.h in xe/tests/xe_dma_buf.c (Francois)
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Acked-by: Aravind Iddamsetty <aravind.iddamsetty@linux.intel.com> Acked-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Acked-by: José Roberto de Souza <jose.souza@intel.com> Acked-by: Mateusz Naklicki <mateusz.naklicki@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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7a8bc117 |
| 14-Dec-2023 |
Lucas De Marchi <lucas.demarchi@intel.com> |
drm/xe: Enable W=1 warnings by default
Like done in commit 2250c7ead8ad ("drm/i915: enable W=1 warnings by default") for i915, enable W=1 warnings by default in xe.
Reviewed-by: Rodrigo Vivi <rodri
drm/xe: Enable W=1 warnings by default
Like done in commit 2250c7ead8ad ("drm/i915: enable W=1 warnings by default") for i915, enable W=1 warnings by default in xe.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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Revision tags: v6.7-rc5 |
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1c8e9019 |
| 08-Dec-2023 |
Sujaritha Sundaresan <sujaritha.sundaresan@intel.com> |
drm/xe: Add frequency throttle reasons sysfs attributes
Add throttle reasons sysfs attributes under a separate directory.
/device/tile<n>/gt<n>/freq0/throttle |- reason_pl1 |- reason_pl2 |
drm/xe: Add frequency throttle reasons sysfs attributes
Add throttle reasons sysfs attributes under a separate directory.
/device/tile<n>/gt<n>/freq0/throttle |- reason_pl1 |- reason_pl2 |- reason_pl4 |- reason_prochot |- reason_ratl |- reason_vr_tdc |- reason_vr_thermalert |- status
v2: Remove unnecessary headers and clean-up action (Riana)
Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com> Reviewed-by: Riana Tauro <riana.tauro@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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bef52b5c |
| 08-Dec-2023 |
Rodrigo Vivi <rodrigo.vivi@intel.com> |
drm/xe: Create a xe_gt_freq component for raw management and sysfs
Goals of this new xe_gt_freq component: 1. Detach sysfs controls and raw freq management from GuC SLPC. 2. Create a directory that
drm/xe: Create a xe_gt_freq component for raw management and sysfs
Goals of this new xe_gt_freq component: 1. Detach sysfs controls and raw freq management from GuC SLPC. 2. Create a directory that could later be aligned with devfreq. 3. Encapsulate all the freq control in a single directory. Although we only have one freq domain per GT, already start with a numbered freq0 directory so it could be expanded in the future if multiple domains or PLL are needed.
Note: Although in the goal #1, the raw freq management control is mentioned, this patch only starts by the sysfs control. The RP freq configuration and init freq selection are still under the guc_pc, but should be moved to this component in a follow-up patch.
v2: - Add /tile# to the doc and remove unnecessary kobject_put (Riana) - s/ssize_t/int on some ret variables (Vinay)
Cc: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Cc: Riana Tauro <riana.tauro@intel.com> Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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Revision tags: v6.7-rc4 |
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b1d20405 |
| 28-Nov-2023 |
Michal Wajdeczko <michal.wajdeczko@intel.com> |
drm/xe/pf: Introduce Local Memory Translation Table
The Local Memory Translation Table (LMTT) provides additional abstraction for Virtual Functions (VF) accessing device VRAM.
This code is based on
drm/xe/pf: Introduce Local Memory Translation Table
The Local Memory Translation Table (LMTT) provides additional abstraction for Virtual Functions (VF) accessing device VRAM.
This code is based on prior work of Michal Winiarski.
In this patch we focus only on LMTT initialization. Remaining LMTT functions will be used once we add a VF provisioning to the PF.
Bspec: 44117, 52404, 59314 Reviewed-by: Michał Winiarski <michal.winiarski@intel.com> Link: https://lore.kernel.org/r/20231128151507.1015-4-michal.wajdeczko@intel.com Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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Revision tags: v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6 |
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0d97ecce |
| 09-Oct-2023 |
Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> |
drm/xe: Enable Fixed CCS mode setting
Disable dynamic HW load balancing of compute resource assignment to engines and instead enabled fixed mode of mapping compute resources to engines on all platfo
drm/xe: Enable Fixed CCS mode setting
Disable dynamic HW load balancing of compute resource assignment to engines and instead enabled fixed mode of mapping compute resources to engines on all platforms with more than one compute engine.
By default enable only one CCS engine with all compute slices assigned to it. This is the desired configuration for common workloads.
PVC platform supports only the fixed CCS mode (workaround 16016805146).
v2: Rebase, make it platform agnostic v3: Minor code refactoring
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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a754391f |
| 01-Dec-2023 |
Animesh Manna <animesh.manna@intel.com> |
drm/xe/dsb: DSB implementation for xe
Add xe specific DSB buffer handling methods.
v1: Initial version. v2: Add null check after dynamic memory allocation of vma. [Uma]
Reviewed-by: Uma Shankar <u
drm/xe/dsb: DSB implementation for xe
Add xe specific DSB buffer handling methods.
v1: Initial version. v2: Add null check after dynamic memory allocation of vma. [Uma]
Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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c550f64f |
| 18-Nov-2023 |
Vinay Belgaumkar <vinay.belgaumkar@intel.com> |
drm/xe: Rename xe_gt_idle_sysfs to xe_gt_idle
Prep this file to contain C6 toggling as well instead of just sysfs related stuff.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Vi
drm/xe: Rename xe_gt_idle_sysfs to xe_gt_idle
Prep this file to contain C6 toggling as well instead of just sysfs related stuff.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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0881cbe0 |
| 17-Nov-2023 |
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> |
drm/xe/gsc: Query GSC compatibility version
The version is obtained via a dedicated MKHI GSC HECI command. The compatibility version is what we want to match against for the GSC, so we need to call
drm/xe/gsc: Query GSC compatibility version
The version is obtained via a dedicated MKHI GSC HECI command. The compatibility version is what we want to match against for the GSC, so we need to call the FW version checker after obtaining the version.
Since this is the first time we send a GSC HECI command via the GSCCS, this patch also introduces common infrastructure to send such commands to the GSC. Communication with the GSC FW is done via input/output buffers, whose addresses are provided via a GSCCS command. The buffers contain a generic header and a client-specific packet (e.g. PXP, HDCP); the clients don't care about the header format and/or the GSCCS command in the batch, they only care about their client-specific header. This patch therefore introduces helpers that allow the callers to automatically fill in the input header, submit the GSCCS job and decode the output header, to make it so that the caller only needs to worry about their client-specific input and output messages.
v3: squash of 2 separate patches ahead of merge, so that the common functions and their first user are added at the same time
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Cc: Suraj Kandpal <suraj.kandpal@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.Com> #v1 Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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aae84bf1 |
| 17-Nov-2023 |
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> |
drm/xe/gsc: Implement WA 14015076503
When the GSC FW is loaded, we need to inform it when a GSCCS reset is coming and then wait 200ms for it to get ready to process the reset.
v2: move WA code to G
drm/xe/gsc: Implement WA 14015076503
When the GSC FW is loaded, we need to inform it when a GSCCS reset is coming and then wait 200ms for it to get ready to process the reset.
v2: move WA code to GSC file, use variable in Makefile (John)
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <john.c.harrison@intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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