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249acb5f |
| 19-Mar-2019 |
Mark Brown <broonie@kernel.org> |
Merge tag 'v5.1-rc1' into spi-5.2
Linux 5.1-rc1
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c9e48084 |
| 19-Mar-2019 |
Mark Brown <broonie@kernel.org> |
Merge tag 'v5.1-rc1' into regulator-5.2
Linux 5.1-rc1
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12747059 |
| 18-Mar-2019 |
Mark Brown <broonie@kernel.org> |
Merge tag 'v5.1-rc1' into asoc-5.2
Linux 5.1-rc1
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22d91ed3 |
| 18-Mar-2019 |
Mark Brown <broonie@kernel.org> |
Merge tag 'v5.1-rc1' into asoc-5.1
Linux 5.1-rc1
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Revision tags: v5.1-rc1 |
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384d11fa |
| 06-Mar-2019 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann: "As usual, the drivers/tee and drivers/reset subsystems get merge
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann: "As usual, the drivers/tee and drivers/reset subsystems get merged here, with the expected set of smaller updates and some new hardware support. The tee subsystem now supports device drivers to be attached to a tee, the first example here is a random number driver with its implementation in the secure world.
Three new power domain drivers get added for specific chip families: - Broadcom BCM283x chips (used in Raspberry Pi) - Qualcomm Snapdragon phone chips - Xilinx ZynqMP FPGA SoCs
One new driver is added to talk to the BPMP firmware on NVIDIA Tegra210
Existing drivers are extended for new SoC variants from NXP, NVIDIA, Amlogic and Qualcomm"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (113 commits) tee: optee: update optee_msg.h and optee_smc.h to dual license tee: add cancellation support to client interface dpaa2-eth: configure the cache stashing amount on a queue soc: fsl: dpio: configure cache stashing destination soc: fsl: dpio: enable frame data cache stashing per software portal soc: fsl: guts: make fsl_guts_get_svr() static hwrng: make symbol 'optee_rng_id_table' static tee: optee: Fix unsigned comparison with less than zero hwrng: Fix unsigned comparison with less than zero tee: fix possible error pointer ctx dereferencing hwrng: optee: Initialize some structs using memset instead of braces tee: optee: Initialize some structs using memset instead of braces soc: fsl: dpio: fix memory leak of a struct qbman on error exit path clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static soc: qcom: llcc-slice: Fix typos qcom: soc: llcc-slice: Consolidate some code qcom: soc: llcc-slice: Clear the global drv_data pointer on error drivers: soc: xilinx: Add ZynqMP power domain driver firmware: xilinx: Add APIs to control node status/power dt-bindings: power: Add ZynqMP power domain bindings ...
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Revision tags: v5.0, v5.0-rc8, v5.0-rc7 |
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f73e22d6 |
| 15-Feb-2019 |
Arnd Bergmann <arnd@arndb.de> |
Merge tag 'tegra-for-5.1-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
firmware: tegra: Changes for v5.1-rc1
These changes add support for BPMP on Tegra210
Merge tag 'tegra-for-5.1-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
firmware: tegra: Changes for v5.1-rc1
These changes add support for BPMP on Tegra210.
* tag 'tegra-for-5.1-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: firmware/tegra: Enable Tegra186 BPMP support on Tegra194 firmware: tegra: Conditionally support SoC generations firmware: tegra: bpmp-tegra186: Remove unused includes firmware: tegra: add bpmp driver for Tegra210 firmware: tegra: Refactor BPMP driver firmware: tegra: Reword messaging terminology
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v5.0-rc6, v5.0-rc5, v5.0-rc4 |
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139251fc |
| 24-Jan-2019 |
Timo Alho <talho@nvidia.com> |
firmware: tegra: add bpmp driver for Tegra210
This patch adds driver for Tegra210 BPMP firmware.
The BPMP is a specific processor in Tegra210 chip, which runs firmware for assisting in entering dee
firmware: tegra: add bpmp driver for Tegra210
This patch adds driver for Tegra210 BPMP firmware.
The BPMP is a specific processor in Tegra210 chip, which runs firmware for assisting in entering deep low power states (suspend to ram), and offloading DRAM memory clock scaling on some platforms.
Based on work by Sivaram Nair <sivaramn@nvidia.com>
Signed-off-by: Timo Alho <talho@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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