History log of /linux/drivers/edac/skx_common.c (Results 226 – 232 of 232)
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# 249acb5f 19-Mar-2019 Mark Brown <broonie@kernel.org>

Merge tag 'v5.1-rc1' into spi-5.2

Linux 5.1-rc1


# c9e48084 19-Mar-2019 Mark Brown <broonie@kernel.org>

Merge tag 'v5.1-rc1' into regulator-5.2

Linux 5.1-rc1


# 12747059 18-Mar-2019 Mark Brown <broonie@kernel.org>

Merge tag 'v5.1-rc1' into asoc-5.2

Linux 5.1-rc1


# 22d91ed3 18-Mar-2019 Mark Brown <broonie@kernel.org>

Merge tag 'v5.1-rc1' into asoc-5.1

Linux 5.1-rc1


Revision tags: v5.1-rc1
# 1b37b8c4 08-Mar-2019 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'edac_for_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

Pull EDAC updates from Borislav Petkov:

- A new EDAC AST 2500 SoC driver (Stefan M Schaeckeler)

- New i10nm EDAC d

Merge tag 'edac_for_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

Pull EDAC updates from Borislav Petkov:

- A new EDAC AST 2500 SoC driver (Stefan M Schaeckeler)

- New i10nm EDAC driver for Intel 10nm CPUs (Qiuxu Zhuo and Tony Luck)

- Altera SDRAM functionality carveout for separate enablement of RAS
and SDRAM capabilities on some Altera chips. (Thor Thayer)

- The usual round of cleanups and fixes

And last but not least: recruit James Morse as a reviewer for the ARM
side.

* tag 'edac_for_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
EDAC/altera: Add separate SDRAM EDAC config
EDAC, altera: Add missing of_node_put()
EDAC, skx_common: Add code to recognise new compound error code
EDAC, i10nm: Fix randconfig builds
EDAC, i10nm: Add a driver for Intel 10nm server processors
EDAC, skx_edac: Delete duplicated code
EDAC, skx_common: Separate common code out from skx_edac
EDAC: Do not check return value of debugfs_create() functions
EDAC: Add James Morse as a reviewer
dt-bindings, EDAC: Add Aspeed AST2500
EDAC, aspeed: Add an Aspeed AST2500 EDAC driver

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Revision tags: v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6
# cbfa482f 05-Feb-2019 Tony Luck <tony.luck@intel.com>

EDAC, skx_common: Add code to recognise new compound error code

A new error code for systems that use DRAM as an extra level of cache
looks like:

000F 0010 1MMM CCCC

where the MMM and CCCC bit

EDAC, skx_common: Add code to recognise new compound error code

A new error code for systems that use DRAM as an extra level of cache
looks like:

000F 0010 1MMM CCCC

where the MMM and CCCC bits are used for the same purpose as the
original code. For this new class of errors the ADXL translation will
provide details of both the DIMM used as cache for the error location
and the component that is being cached.

Note: This new error code is first supported in Skylake. Older EDAC
drivers do not need to be updated.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Aristeu Rozanski <aris@redhat.com>
Cc: James Morse <james.morse@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: https://lkml.kernel.org/r/20190205182109.27828-1-tony.luck@intel.com

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Revision tags: v5.0-rc5
# 88a242c9 30-Jan-2019 Qiuxu Zhuo <qiuxu.zhuo@intel.com>

EDAC, skx_common: Separate common code out from skx_edac

Parts of skx_edac can be shared with the Intel 10nm server EDAC driver.

Carve out the common parts from skx_edac in preparation to support b

EDAC, skx_common: Separate common code out from skx_edac

Parts of skx_edac can be shared with the Intel 10nm server EDAC driver.

Carve out the common parts from skx_edac in preparation to support both
skx_edac driver and i10nm_edac drivers.

Co-developed-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: James Morse <james.morse@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: https://lkml.kernel.org/r/20190130191519.15393-3-tony.luck@intel.com

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