EDAC/igen6: Add debugfs interface for Intel client SoC EDAC driver

Add debugfs support to fake memory correctable errors to test the
error reporting path and the error address decoding logic in the

EDAC/igen6: Add debugfs interface for Intel client SoC EDAC driver

Add debugfs support to fake memory correctable errors to test the
error reporting path and the error address decoding logic in the
igen6_edac driver.

Please note that the fake errors are also reported to EDAC core and
then the CE counter in EDAC sysfs is also increased.

Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>

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EDAC/igen6: Add EDAC driver for Intel client SoCs using IBECC

This driver supports Intel client SoC with integrated memory controller
using In-Band ECC(IBECC). The memory correctable and uncorrectab

EDAC/igen6: Add EDAC driver for Intel client SoCs using IBECC

This driver supports Intel client SoC with integrated memory controller
using In-Band ECC(IBECC). The memory correctable and uncorrectable errors
are reported via NMIs. The driver handles the NMIs and decodes the memory
error address to platform specific address. The first IBECC-supported SoC
is Elkhart Lake.

[Tony: s/#include <linux/nmi.h>/#include <asm/nmi.h>/ to fix randconfig build]

Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>

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