Merge tag 'v4.4-rc1' into HEAD

Linux 4.4-rc1

Sync to Linus v4.4-rc2 for LSM developers.

Merge tag 'v4.4-rc2' into drm-intel-next-queued

Linux 4.4-rc2

Backmerge to get at

commit 1b0e3a049efe471c399674fd954500ce97438d30
Author: Imre Deak <imre.deak@intel.com>
Date: Thu Nov 5 23:04:11

Merge tag 'v4.4-rc2' into drm-intel-next-queued

Linux 4.4-rc2

Backmerge to get at

commit 1b0e3a049efe471c399674fd954500ce97438d30
Author: Imre Deak <imre.deak@intel.com>
Date: Thu Nov 5 23:04:11 2015 +0200

drm/i915/skl: disable display side power well support for now

so that we can proplery re-eanble skl power wells in -next.

Conflicts are just adjacent lines changed, except for intel_fbdev.c
where we need to interleave the changs. Nothing nefarious.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>

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Merge tag 'v4.4-rc1' into patchwork

Linux 4.4-rc1

* tag 'v4.4-rc1': (12900 commits)
Linux 4.4-rc1
ARC: Fix silly typo in MAINTAINERS file
ARC: cpu_relax() to be compiler barrier even for UP

Merge tag 'v4.4-rc1' into patchwork

Linux 4.4-rc1

* tag 'v4.4-rc1': (12900 commits)
Linux 4.4-rc1
ARC: Fix silly typo in MAINTAINERS file
ARC: cpu_relax() to be compiler barrier even for UP
ARC: use ASL assembler mnemonic
ARC: [arcompact] Handle bus error from userspace as Interrupt not exception
ARC: remove extraneous header include
f2fs: xattr simplifications
squashfs: xattr simplifications
9p: xattr simplifications
xattr handlers: Pass handler to operations instead of flags
jffs2: Add missing capability check for listing trusted xattrs
hfsplus: Remove unused xattr handler list operations
ubifs: Remove unused security xattr handler
vfs: Fix the posix_acl_xattr_list return value
vfs: Check attribute names in posix acl xattr handers
mpt3sas: fix inline markers on non inline function declarations
dax: fix __dax_pmd_fault crash
Revert "drm/rockchip: Convert the probe function to the generic drm_of_component_probe()"
drm: Don't oops in drm_calc_timestamping_constants() if drm_vblank_init() wasn't called
ALSA: pci: depend on ZONE_DMA
...

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Merge v4.4-rc1 into MTD development

Sync up with the upstream development.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>

Merge branch 'x15-audio-fixes' into omap-for-v4.4/fixes

Merge branch 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 apic changes from Ingo Molnar:
"The main changes in this cycle were:

- Numachip updates: new

Merge branch 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 apic changes from Ingo Molnar:
"The main changes in this cycle were:

- Numachip updates: new hardware support, fixes and cleanups.
(Daniel J Blueman)

- misc smaller cleanups and fixlets"

* 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/io_apic: Make eoi_ioapic_pin() static
x86/irq: Drop unlikely before IS_ERR_OR_NULL
x86/x2apic: Make stub functions available even if !CONFIG_X86_LOCAL_APIC
x86/apic: Deinline various functions
x86/numachip: Fix timer build conflict
x86/numachip: Introduce Numachip2 timer mechanisms
x86/numachip: Add Numachip IPI optimisations
x86/numachip: Add Numachip2 APIC support
x86/numachip: Cleanup Numachip support

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x86/numachip: Fix timer build conflict

Fix Numachip build conflict from:
ce2e572 x86/numachip: Introduce Numachip2 timer mechanisms

drivers/built-in.o:(.discard+0x1b): multiple definition of `__pcp

x86/numachip: Fix timer build conflict

Fix Numachip build conflict from:
ce2e572 x86/numachip: Introduce Numachip2 timer mechanisms

drivers/built-in.o:(.discard+0x1b): multiple definition of `__pcpu_unique_cpu_ced'
arch/x86/built-in.o:(.discard+0xa0da): first defined here

Ensure cpu_ced is unique by prefixing with 'numachip2'.

Signed-off-by: Daniel J Blueman <daniel@numascale.com>
Cc: <tipbuild@zytor.com>
Cc: <kbuild-all@01.org>
Cc: Steffen Persvold <sp@numascale.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

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x86/numachip: Introduce Numachip2 timer mechanisms

Add 1GHz 64-bit Numachip2 clocksource timer support for accurate
system-wide timekeeping, as core TSCs are unsynchronised.

Additionally, add a per

x86/numachip: Introduce Numachip2 timer mechanisms

Add 1GHz 64-bit Numachip2 clocksource timer support for accurate
system-wide timekeeping, as core TSCs are unsynchronised.

Additionally, add a per-core clockevent mechanism that interrupts via the
platform IPI vector after a programmed period.

[ tglx: Taking it through x86 due to dependencies ]

Signed-off-by: Daniel J Blueman <daniel@numascale.com>
Acked-by: Steffen Persvold <sp@numascale.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: http://lkml.kernel.org/r/1442829745-29311-1-git-send-email-daniel@numascale.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

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