Merge branch 'for-4.18/alps' into for-linus

hid-alps driver cleanups wrt. t4_read_write_register() handling
from Christophe Jaillet

Merge branch 'next' into for-linus

Prepare input updates for 4.18 merge window.

Merge branches 'clk-warn', 'clk-core', 'clk-spear' and 'clk-qcom-msm8998' into clk-next

* clk-warn:
clk: Print the clock name and warning cause

* clk-core:
clk: Remove clk_init_cb typedef

* cl

Merge branches 'clk-warn', 'clk-core', 'clk-spear' and 'clk-qcom-msm8998' into clk-next

* clk-warn:
clk: Print the clock name and warning cause

* clk-core:
clk: Remove clk_init_cb typedef

* clk-spear:
clk: spear: fix WDT clock definition on SPEAr600

* clk-qcom-msm8998:
clk: qcom: Add MSM8998 Global Clock Control (GCC) driver

show more ...

Merge tag 'v4.17-rc6' into next

Sync up with mainline to bring in Atmel controller changes for Caroline.

Merge remote-tracking branch 'net-next/master' into mac80211-next

Bring in net-next which had pulled in net, so I have the changes
from mac80211 and can apply a patch that would otherwise conflict.

Merge remote-tracking branch 'net-next/master' into mac80211-next

Bring in net-next which had pulled in net, so I have the changes
from mac80211 and can apply a patch that would otherwise conflict.

Signed-off-by: Johannes Berg <johannes.berg@intel.com>

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Merge branch 'drm-intel-next-queued' into gvt-next

Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>

Merge remote-tracking branch 'drm/drm-next' into drm-misc-next

drm-misc-next is still based on v4.16-rc7, and was getting a bit stale.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.inte

Merge remote-tracking branch 'drm/drm-next' into drm-misc-next

drm-misc-next is still based on v4.16-rc7, and was getting a bit stale.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

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Merge drm/drm-next into drm-intel-next-queued

Need d224985a5e31 ("sched/wait, drivers/drm: Convert wait_on_atomic_t()
usage to the new wait_var_event() API") in dinq to be able to fix
https://bugs.f

Merge drm/drm-next into drm-intel-next-queued

Need d224985a5e31 ("sched/wait, drivers/drm: Convert wait_on_atomic_t()
usage to the new wait_var_event() API") in dinq to be able to fix
https://bugs.freedesktop.org/show_bug.cgi?id=106085.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

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Merge tag 'v4.17-rc3' into apparmor-next

Linux v4.17-rc3

Merge in v4.17 for LSM updates

Signed-off-by: John Johansen <john.johansen@canonical.com>

Merge tag 'v4.17-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into fbdev-for-next

Linux 4.17-rc2

Merge tag 'v4.17-rc2' into next-general

Sync to Linux 4.17-rc2 for developers.

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

Conflicts were simple overlapping changes in microchip
driver.

Signed-off-by: David S. Miller <davem@davemloft.net>

Back merge 'drm-intel-fixes' into gvt-fixes

Need for 4.17-rc1

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"The large diff this time around is from the addition of a new clk
driver

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"The large diff this time around is from the addition of a new clk
driver for the TI Davinci family of SoCs. So far those clks have been
supported with a custom implementation of the clk API in the arch port
instead of in the CCF. With this driver merged we're one step closer
to having a single clk API implementation.

The other large diff is from the Amlogic clk driver that underwent
some major surgery to use regmap. Beyond that, the biggest hitter is
Samsung which needed some reworks to properly handle clk provider
power domains and a bunch of PLL rate updates.

The core framework was fairly quiet this round, just getting some
cleanups and small fixes for some of the more esoteric features. And
the usual set of driver non-critical fixes, cleanups, and minor
additions are here as well.

Core:
- Rejig clk_ops::init() to be a little earlier for phase/accuracy ops
- debugfs ops macroized to shave some lines of boilerplate code
- Always calculate the phase instead of caching it in clk_get_phase()
- More __must_check on bulk clk APIs

New Drivers:
- TI's Davinci family of SoCs
- Intel's Stratix10 SoC
- stm32mp157 SoC
- Allwinner H6 CCU
- Silicon Labs SI544 clock generator chip
- Renesas R-Car M3-N and V3H SoCs
- i.MX6SLL SoCs

Removed Drivers:
- ST-Ericsson AB8540/9540

Updates:
- Mediatek MT2701 and MT7622 audsys support and MT2712 updates
- STM32F469 DSI and STM32F769 sdmmc2 support
- GPIO clks can sleep now
- Spreadtrum SC9860 RTC clks
- Nvidia Tegra MBIST workarounds and various minor fixes
- Rockchip phase handling fixes and a memory leak plugged
- Renesas drivers switch to readl/writel from clk_readl/clk_writel
- Renesas gained CPU (Z/Z2) and watchdog support
- Rockchip rk3328 display clks and rk3399 1.6GHz PLL support
- Qualcomm PM8921 PMIC XO buffers
- Amlogic migrates to regmap APIs
- TI Keystone clk latching support
- Allwinner H3 and H5 video clk fixes
- Broadcom BCM2835 PLLs needed another bit to enable
- i.MX6SX CKO mux fix and i.MX7D Video PLL divider fix
- i.MX6UL/ULL epdc_podf support
- Hi3798CV200 COMBPHY0 and USB2_OTG_UTMI and phase support for eMMC"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (233 commits)
clk: davinci: add a reset lookup table for psc0
clk: imx: add clock driver for imx6sll
dt-bindings: imx: update clock doc for imx6sll
clk: imx: add new gate/gate2 wrapper funtion
clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux
clk: cs2000: set pm_ops in hibernate-compatible way
clk: bcm2835: De-assert/assert PLL reset signal when appropriate
clk: imx7d: Move clks_init_on before any clock operations
clk: imx7d: Correct ahb clk parent select
clk: imx7d: Correct dram pll type
clk: imx7d: Add USB clock information
clk: socfpga: stratix10: add clock driver for Stratix10 platform
dt-bindings: documentation: add clock bindings information for Stratix10
clk: ti: fix flag space conflict with clkctrl clocks
clk: uniphier: add additional ethernet clock lines for Pro4
clk: uniphier: add SATA clock control support
clk: uniphier: add PCIe clock control support
clk: Add driver for the si544 clock generator chip
clk: davinci: Remove redundant dev_err calls
clk: uniphier: add ethernet clock control support for PXs3
...

show more ...

Merge branches 'clk-davinci', 'clk-si544', 'clk-rockchip', 'clk-uniphier' and 'clk-ti-flag-fix' into clk-next

* clk-davinci:
clk: davinci: Remove redundant dev_err calls
clk: davinci: cfgchip: A

Merge branches 'clk-davinci', 'clk-si544', 'clk-rockchip', 'clk-uniphier' and 'clk-ti-flag-fix' into clk-next

* clk-davinci:
clk: davinci: Remove redundant dev_err calls
clk: davinci: cfgchip: Add TI DA8XX USB PHY clocks
clk: davinci: New driver for TI DA8XX CFGCHIP clocks
dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocks
clk: davinci: Add platform information for TI DM646x PSC
clk: davinci: Add platform information for TI DM644x PSC
clk: davinci: Add platform information for TI DM365 PSC
clk: davinci: Add platform information for TI DM355 PSC
clk: davinci: Add platform information for TI DA850 PSC
clk: davinci: Add platform information for TI DA830 PSC
clk: davinci: New driver for davinci PSC clocks
dt-bindings: clock: New bindings for TI Davinci PSC
clk: davinci: Add platform information for TI DM646x PLL
clk: davinci: Add platform information for TI DM644x PLL
clk: davinci: Add platform information for TI DM365 PLL
clk: davinci: Add platform information for TI DM355 PLL
clk: davinci: Add platform information for TI DA850 PLL
clk: davinci: Add platform information for TI DA830 PLL
clk: davinci: New driver for davinci PLL clocks
dt-bindings: clock: Add new bindings for TI Davinci PLL clocks

* clk-si544:
clk: Add driver for the si544 clock generator chip

* clk-rockchip:
clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399
clk: rockchip: Fix error return in phase clock registration
clk: rockchip: Correct the behaviour of restoring cached phase
clk: rockchip: Fix wrong parents for MMC phase clock for rk3328
clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228
clk: rockchip: Add 1.6GHz PLL rate for rk3399
clk: rockchip: Restore the clock phase after the rate was changed
clk: rockchip: Prevent calculating mmc phase if clock rate is zero
clk: rockchip: Free the memory on the error path
clk: rockchip: document hdmi_phy external input for rk3328
clk: rockchip: add flags for rk3328 dclk_lcdc
clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks
clk: rockchip: protect all remaining rk3328 interconnect clocks
clk: rockchip: export sclk_hdmi_sfc on rk3328
clk: rockchip: remove HCLK_VIO from rk3328 dt header
clk: rockchip: fix hclk_vio_niu on rk3328

* clk-uniphier:
clk: uniphier: add additional ethernet clock lines for Pro4
clk: uniphier: add SATA clock control support
clk: uniphier: add PCIe clock control support
clk: uniphier: add ethernet clock control support for PXs3
clk: uniphier: add Pro4/Pro5/PXs2 audio system clock

* clk-ti-flag-fix:
clk: ti: fix flag space conflict with clkctrl clocks
clk: ti: clkctrl: add support for CLK_SET_RATE_PARENT flag

show more ...

Merge tag 'v4.17-rockchip-clk-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip

Pull more Rockchip clk driver updates from Heiko Stuebner:

Some more fixes f

Merge tag 'v4.17-rockchip-clk-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip

Pull more Rockchip clk driver updates from Heiko Stuebner:

Some more fixes for Rockchip clocks mainly resulting from the changes in
phase-handling. Which revealed some parent issues on rk3228 and rk3328 as
well as additional issue in how handle phase restoration.
And to top it off two assignments of already existing clock ids for rk3399.

* tag 'v4.17-rockchip-clk-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399
clk: rockchip: Fix error return in phase clock registration
clk: rockchip: Correct the behaviour of restoring cached phase
clk: rockchip: Fix wrong parents for MMC phase clock for rk3328
clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228

show more ...

clk: rockchip: Fix wrong parents for MMC phase clock for rk3328

commit c420c1e4db22 ("clk: rockchip: Prevent calculating mmc phase if
clock rate is zero") catches some gremlins for clk-rk3328.c that

clk: rockchip: Fix wrong parents for MMC phase clock for rk3328

commit c420c1e4db22 ("clk: rockchip: Prevent calculating mmc phase if
clock rate is zero") catches some gremlins for clk-rk3328.c that the
parents of MMC phase clock should be clk_{sdmmc, sdio, emmc}, but not
sclk_{sdmmc, sdio, emmc}.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

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Merge tag 'v4.17-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip

Pull Rockchip clk driver updates from Heiko Stuebner:

The rk3328 got the mos

Merge tag 'v4.17-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip

Pull Rockchip clk driver updates from Heiko Stuebner:

The rk3328 got the most love this time, preparing it for supplying actual
display output in the future and actually protecting all necessary clocks.
The rk3399 simply got a special 1.6GHz rate that is going to be needed
for a board and the core code got a fix to actually free allocated memory
in error case as well as making sure the clock-phases don't return bad
values and stay the same on rate changes.

* tag 'v4.17-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: Add 1.6GHz PLL rate for rk3399
clk: rockchip: Restore the clock phase after the rate was changed
clk: rockchip: Prevent calculating mmc phase if clock rate is zero
clk: rockchip: Free the memory on the error path
clk: rockchip: document hdmi_phy external input for rk3328
clk: rockchip: add flags for rk3328 dclk_lcdc
clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks
clk: rockchip: protect all remaining rk3328 interconnect clocks
clk: rockchip: export sclk_hdmi_sfc on rk3328
clk: rockchip: remove HCLK_VIO from rk3328 dt header
clk: rockchip: fix hclk_vio_niu on rk3328

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clk: rockchip: add flags for rk3328 dclk_lcdc

dclk_lcdc can be sourced from a general pll source as well
as the hdmiphy's pll output. We will want to set this source
by hand (to the system-pll-sourc

clk: rockchip: add flags for rk3328 dclk_lcdc

dclk_lcdc can be sourced from a general pll source as well
as the hdmiphy's pll output. We will want to set this source
by hand (to the system-pll-source in most cases) and also
want rate changes to this clock to be able to also touch
the pll source clock if needed, so add CLK_SET_RATE_PARENT
and CLK_SET_RATE_NO_REPARENT for dclk_lcdc.

Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
[ammended commit message]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

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clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks

These are already marked as critical, so there is no need for an
additional ignore_unused flag.

Signed-off-by: Heiko Stuebner <he

clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks

These are already marked as critical, so there is no need for an
additional ignore_unused flag.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

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clk: rockchip: protect all remaining rk3328 interconnect clocks

NIU clocks are supplying the interconnect connections to specific
peripherals and are currently not controlled in any way.
So to preve

clk: rockchip: protect all remaining rk3328 interconnect clocks

NIU clocks are supplying the interconnect connections to specific
peripherals and are currently not controlled in any way.
So to prevent things falling apart at strange moments, mark all
niu clocks as critical.

Most of them where marked as CLK_IGNORE_UNUSED, but that doesn't
help if a parent clock then gets disabled.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

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clk: rockchip: export sclk_hdmi_sfc on rk3328

This clock is one of the dw-hdmi supplying clocks and thus
needs to be exported.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

clk: rockchip: fix hclk_vio_niu on rk3328

The clock wrongly was called hclk_vio and exported, while it actually is
a clock of the interconnect-vio connection and should therefore be always
on till w

clk: rockchip: fix hclk_vio_niu on rk3328

The clock wrongly was called hclk_vio and exported, while it actually is
a clock of the interconnect-vio connection and should therefore be always
on till we actually model the interconnect.

So fix that and don't export it as HCLK_VIO.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

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Merge back ACPICA material for v4.13.

Merge remote-tracking branch 'origin/master' into drm-misc-next-fixes

Backmerge 4.12-rc6 into -next-fixes. -next-fixes will contain find patches
for 4.13 merge window