Merge tag 'v4.11-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull Rockchip clk updates from Heiko Stuebner:

A new clock-type for the 1-2 muxes

Merge tag 'v4.11-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull Rockchip clk updates from Heiko Stuebner:

A new clock-type for the 1-2 muxes per soc that are for whatever reason
controlled through the General Register Files, support for the rk3328
clock-controller (including a new pll-type) and the usual clock ids and
some fixes.

* tag 'v4.11-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: clk: add rockchip,grf property for RK3399
clk: rockchip: use clock ids for memory controller parts on rk3066/rk3188
clk: rockchip: use rk3288 isp_in clock ids
clk: rockchip: add clock ids for memory controller parts on rk3066/rk3188
clk: rockchip: add rk3288 isp_in clock ids
clk: rockchip: Remove useless init of "grf" to -EPROBE_DEFER
clk: rockchip: add clock controller for rk3328
dt-bindings: add bindings for rk3328 clock controller
clk: rockchip: add dt-binding header for rk3328
clk: rockchip: add new pll-type for rk3328
clk: rockchip: describe aclk_vcodec using the new muxgrf type on rk3288
clk: rockchip: add a clock-type for muxes based in the grf

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Merge tag 'v4.10-rc1' into asoc-samsung

Linux 4.10-rc1

Merge tag 'v4.10-rc1' into spi-s3c64xx

Linux 4.10-rc1

clk: rockchip: add clock controller for rk3328

Add the clock tree definition for the new rk3328 SoC.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@snte

clk: rockchip: add clock controller for rk3328

Add the clock tree definition for the new rk3328 SoC.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

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Merge tag 'v4.10-rc2' into drm-intel-next-queued

Backmerge Linux 4.10-rc2 to resync with our -fixes cherry-picks. I've
done the backmerge directly because Dave is on vacation.

Signed-off-by: Daniel

Merge tag 'v4.10-rc2' into drm-intel-next-queued

Backmerge Linux 4.10-rc2 to resync with our -fixes cherry-picks. I've
done the backmerge directly because Dave is on vacation.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>

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clk: rockchip: add a clock-type for muxes based in the grf

Rockchip socs often have some tiny number of muxes not controlled from
the core clock controller but through bits set in the general regist

clk: rockchip: add a clock-type for muxes based in the grf

Rockchip socs often have some tiny number of muxes not controlled from
the core clock controller but through bits set in the general register
files. Add a clock-type that can control these as well, so that we
don't need to work around them being absent.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

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Merge tag 'v4.10-rc1' into docs-next

Linux 4.10-rc1

Merge tag 'v4.10-rc1' into patchwork

Linux 4.10-rc1

* tag 'v4.10-rc1': (11427 commits)
Linux 4.10-rc1
powerpc: Fix build warning on 32-bit PPC
avoid spurious "may be used uninitialized" warni

Merge tag 'v4.10-rc1' into patchwork

Linux 4.10-rc1

* tag 'v4.10-rc1': (11427 commits)
Linux 4.10-rc1
powerpc: Fix build warning on 32-bit PPC
avoid spurious "may be used uninitialized" warning
mm: add PageWaiters indicating tasks are waiting for a page bit
mm: Use owner_priv bit for PageSwapCache, valid when PageSwapBacked
ktime: Get rid of ktime_equal()
ktime: Cleanup ktime_set() usage
ktime: Get rid of the union
clocksource: Use a plain u64 instead of cycle_t
irqchip/armada-xp: Consolidate hotplug state space
irqchip/gic: Consolidate hotplug state space
coresight/etm3/4x: Consolidate hotplug state space
cpu/hotplug: Cleanup state names
cpu/hotplug: Remove obsolete cpu hotplug register/unregister functions
staging/lustre/libcfs: Convert to hotplug state machine
scsi/bnx2i: Convert to hotplug state machine
scsi/bnx2fc: Convert to hotplug state machine
cpu/hotplug: Prevent overwriting of callbacks
x86/msr: Remove bogus cleanup from the error path
bus: arm-ccn: Prevent hotplug callback leak
...

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Merge branch 'next' into for-linus

Prepare input updates for 4.10 merge window.

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This is a fairly quiet release. We don't have any patches to the core
fra

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This is a fairly quiet release. We don't have any patches to the core
framework. The only patch that can even be considered "core" adds
another clk_get() variant. The rest of the changes are in drivers for
various SoCs, and we have a few bits for ARM shmobile architecture
code (dts and mach) due to the dependency we're breaking between
shmobile architecture code and its clk driver. Those shmobile bits
have also been pulled into arm-soc tree. Here's the summary:

Core:

- Support for devm_get_clk_from_child() used with DT bindings that
have subnodes with the 'clocks' property

New Drivers:

- Allwinner A64 (sun50i)
- i.MX imx6ull
- Socionext's UniPhier SoC CPUs
- Mediatek MT2701 SoCs
- Rockchip rk1108 SoCs
- Qualcomm MSM8994/MSM8992 SoCS
- Qualcomm RPM Clocks
- Hisilicon Hi3516CV300 and Hi3798CV200 CRG
- Oxford Semiconductor OX820 and OX810SE SoCs
- Renesas RZ/G1M and RZ/GIE SoCs
- Renesas R-Car RST driver for mode pin states

Updates:

- Four Allwinner SoCs are migrated to the new style clk driver
- Rockchip rk3399,rk3066 PLL optimizations
- i.MX LVDS display glitch fixes and AV PLL precision improvements
- Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL
support
- Explicit demodularization of always builtin drivers
- Freescale Qoriq ls1012a and ls1046a support
- Exynos 5433 parent typo fix and critical clock tagging
- Renesas r8a7743/r8a7745 CPG
- Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support
- stm32f4* LSI, LSE, RTC, and QSPI clocks
- pxa27x and pxa25x cpufreq as clks
- TI omap36xx sprz319 advisory 2.1 workaround
- Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
clk: bcm: Fix 'maybe-uninitialized' warning in bcm2835_clock_choose_div_and_prate()
clk: add devm_get_clk_from_child() API
clk: st: clk-flexgen: Unmap region obtained by of_iomap
clk: keystone: pll: Unmap region obtained by of_iomap
clk:mmp:clk-of-mmp2: Free memory and Unmap region obtained by kzalloc and of_iomap
clk:mmp:clk-of-pxa910: Free memory and Unmap region obtained by kzmalloc and of_iomap
clk: mmp: clk-of-pxa1928: Free memory obtained by kzalloc
clk: cdce925: Fix limit check
clk: bcm: Make COMMON_CLK_IPROC into a library
clk: qoriq: added ls1012a clock configuration
clk: ti: dra7: fix "failed to lookup clock node gmac_gmii_ref_clk_div" boot message
clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clock
clk: bcm: Support rate change propagation on bcm2835 clocks
clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
clk: ti: omap36xx: Work around sprz319 advisory 2.1
clk: clk-wm831x: fix a logic error
clk: uniphier: add cpufreq data for LD11, LD20 SoCs
clk: uniphier: add CPU-gear change (cpufreq) support
clk: qcom: Put venus core0/1 gdscs to hw control mode
clk: qcom: gdsc: Add support for gdscs with HW control
...

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Merge tag 'v4.10-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull rockchip clk driver updates from Heiko Stuebner:

A new clock controller for

Merge tag 'v4.10-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull rockchip clk driver updates from Heiko Stuebner:

A new clock controller for the rk1108 soc (single-core Cortex-A7+DSP),
a fix making sure the cpuclk rate is actually valid, before trying to
set it and a copy-paste fix for the rk3399's testclk.

* tag 'v4.10-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: add clock controller for rk1108
dt-bindings: add documentation for rk1108 cru
clk: rockchip: add dt-binding header for rk1108
clk: rockchip: fix copy-paste error in rk3399 testclk
clk: rockchip: validity should be checked prior to cpu clock rate change

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clk: rockchip: add clock controller for rk1108

Add the clock tree definition and driver for rk1108 SoC.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Tested-by: Jacob Chen <jacob2.chen@rock-c

clk: rockchip: add clock controller for rk1108

Add the clock tree definition and driver for rk1108 SoC.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Tested-by: Jacob Chen <jacob2.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

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Merge branch 'topic/error' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator into regulator-fixed

Merge back earlier cpufreq material for v4.10.

Merge remote-tracking branch 'airlied/drm-next' into topic/drm-misc

Backmerge latest drm-next to have a baseline for the
s/fence/dma_fence/ patch from Chris.

Signed-off-by: Daniel Vetter <daniel.ve

Merge remote-tracking branch 'airlied/drm-next' into topic/drm-misc

Backmerge latest drm-next to have a baseline for the
s/fence/dma_fence/ patch from Chris.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>

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Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued

Backmerge because Chris Wilson needs the very latest&greates of
Gustavo Padovan's sync_file work, specifically the refcount

Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued

Backmerge because Chris Wilson needs the very latest&greates of
Gustavo Padovan's sync_file work, specifically the refcounting changes
from:

commit 30cd85dd6edc86ea8d8589efb813f1fad41ef233
Author: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Date: Wed Oct 19 15:48:32 2016 -0200

dma-buf/sync_file: hold reference to fence when creating sync_file

Also good to sync in general since git tends to get confused with the
cherry-picking going on.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>

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Merge tag 'v4.9-rc1' into patchwork

Linux 4.9-rc1

* tag 'v4.9-rc1': (13774 commits)
Linux 4.9-rc1
score: traps: Add missing include file to fix build error
fs/super.c: don't fool lockdep in f

Merge tag 'v4.9-rc1' into patchwork

Linux 4.9-rc1

* tag 'v4.9-rc1': (13774 commits)
Linux 4.9-rc1
score: traps: Add missing include file to fix build error
fs/super.c: don't fool lockdep in freeze_super() and thaw_super() paths
fs/super.c: fix race between freeze_super() and thaw_super()
overlayfs: Fix setting IOP_XATTR flag
iov_iter: kernel-doc import_iovec() and rw_copy_check_uvector()
CIFS: Retrieve uid and gid from special sid if enabled
CIFS: Add new mount option to set owner uid and gid from special sids in acl
qedr: Add events support and register IB device
qedr: Add GSI support
qedr: Add LL2 RoCE interface
qedr: Add support for data path
qedr: Add support for memory registeration verbs
qedr: Add support for QP verbs
qedr: Add support for PD,PKEY and CQ verbs
qedr: Add support for user context verbs
qedr: Add support for RoCE HW init
qedr: Add RoCE driver framework
pkeys: Remove easily triggered WARN
MIPS: Wire up new pkey_{mprotect,alloc,free} syscalls
...

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Merge tag 'v4.9-rc1' into x86/fpu, to resolve conflict

Signed-off-by: Ingo Molnar <mingo@kernel.org>

Merge tag 'v4.8' into next

Sync up with mainline to bring in I2C host notify changes and other
updates.

Merge tag 'v4.9-rc3' into xtensa-for-next

Linux 4.9-rc3

Merge branches 'pm-cpufreq-fixes' and 'pm-sleep-fixes'

* pm-cpufreq-fixes:
cpufreq: intel_pstate: Always set max P-state in performance mode
cpufreq: intel_pstate: Set P-state upfront in perform

Merge branches 'pm-cpufreq-fixes' and 'pm-sleep-fixes'

* pm-cpufreq-fixes:
cpufreq: intel_pstate: Always set max P-state in performance mode
cpufreq: intel_pstate: Set P-state upfront in performance mode

* pm-sleep-fixes:
PM / suspend: Fix missing KERN_CONT for suspend message

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Merge tag 'v4.9-rc1' into x86/urgent, to pick up updates

Signed-off-by: Ingo Molnar <mingo@kernel.org>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk framework updates from Stephen Boyd:
"The core clk framework changes are small again. They're mostly mi

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk framework updates from Stephen Boyd:
"The core clk framework changes are small again. They're mostly minor
fixes that weren't causing enough problems (or any problems when we're
just clarifying things) to warrant sending outside the merge window.
The majority of changes are in drivers for various SoCs. Full details
are in the logs, but here's the summary.

Core:

- Better support for DeviceTree overlays with the addition of the
CLK_OF_DECLARE_DRIVER macro. Now we won't probe a clk driver for a
device node that matched during of_clk_init(), unless the driver
uses CLK_OF_DECLARE_DRIVER instead of CLK_OF_DECLARE. This allows
overlays to work cleanly for drivers that must probe before the
device model is ready, and also after it's ready when an overlay is
loaded.

- Clarification in the code around how clk_hw pointers are returned
from of clk providers

- Proper migration of prepare/enable counts to parents when the clk
tree is constructed

New Drivers:

- Socionext's UniPhier SoCs
- Loongson1C
- ZTE ZX296718
- Qualcomm MDM9615
- Amlogic GXBB AO clocks and resets
- Broadcom BCM53573 ILP
- Maxim MAX77620

Updates:

- Four Allwinner SoCs are migrated to the new style clk driver (A31,
A31s, A23 and A33)
- Exynos 5xxx audio and DRAM clks
- Loongson1B AC97, DMA and NAND clks
- Rockchip DDR clks and rk3399 driver tweaks
- Renesas R-Car M3-W (r8a7796) SoC SDHI interface and Watchdog timer
clks
- Renasas R-Car H3 and M3-W CMT clks and RAVB+Thermal clks for M3-W
- Amlogic GXBB MMC gate clks
- at91 sama5d4 sckc
- Removal of STiH415 and STiH416 clk support as the SoC is being
removed
- Rework of STiH4xx clk support for new style bindings
- Continuation of driver migration to clk_hw based registration APIs
- xgene PMD support
- bcm2835 critical clk markings
- ARM versatile ICST"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (199 commits)
CLK: Add Loongson1C clock support
clk: Loongson1: Make use of GENMASK
clk: Loongson1: Update clocks of Loongson1B
clk: Loongson1: Refactor Loongson1 clock
clk: change the type of clk_hw_onecell_data.num to unsigned int
clk: zx296718: register driver earlier with core_initcall
clk: mvebu: dynamically allocate resources in Armada CP110 system controller
clk: mvebu: fix setting unwanted flags in CP110 gate clock
clk: nxp: clk-lpc32xx: Unmap region obtained by of_iomap
clk: mediatek: clk-mt8173: Unmap region obtained by of_iomap
clk: sunxi-ng: Fix reset offset for the A23 and A33
clk: at91: sckc: optimize boot time
clk: at91: Add sama5d4 sckc support
clk: at91: move slow clock controller clocks to sckc.c
clk: imx6: initialize GPU clocks
clk: imx6: fix i.MX6DL clock tree to reflect reality
clk: imx53: Add clocks configuration
clk: uniphier: add clock data for UniPhier SoCs
clk: uniphier: add core support code for UniPhier clock driver
clk: bcm: Add driver for BCM53573 ILP clock
...

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Merge tag 'v4.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull rockchip clk driver updates from Heiko Stuebner:

The biggest addition is prob

Merge tag 'v4.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull rockchip clk driver updates from Heiko Stuebner:

The biggest addition is probably the special clock-type for ddr clock
control. While reading that clock is done the normal way from the
registers, setting it always requires some sort of special handling
to let the system survive this addition.

As the commit message explains, there are currently 3 handling-types
known. General SRAM-based code on rk3288 and before (which is waiting
essentially for the PIE support that is currently being worked on),
SCPI-based clk setting on the rk3368 through a coprocessor, which we
might support once the support for legacy scpi-variants has matured
and now on the rk3399 (and probably later) using a dcf controller that
is controlled from the arm-trusted-firmware and gets accessed through
firmware calls from the kernel. This is the variant we currently
support, but the clock type is made to support the other variants in
the future as well.

Apart from that slightly bigger chunk, we have a mix of PLL rates,
clock-ids and flags mainly for the rk3399.

And interestingly an iomap fix for the legacy gate driver, where I
hopefully could deter the submitter from actually using that in any
new works.

* tag 'v4.9-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: use the dclk_vop_frac clock ids on rk3399
clk: rockchip: drop CLK_SET_RATE_PARENT from rk3399 fractional dividers
clk: rockchip: add 2016M to big cpu clk rate table on rk3399
clk: rockchip: add rk3399 ddr clock support
clk: rockchip: add dclk_vop_frac ids for rk3399 vop
clk: rockchip: add new clock-type for the ddrclk
soc: rockchip: add header for ddr rate SIP interface
clk: rockchip: add SCLK_DDRC id for rk3399 ddrc
clk: rockchip: handle of_iomap failures in legacy clock driver
clk: rockchip: mark rk3399 hdcp_noc and vio_noc as critical
clk: rockchip: use general clock flag when registering pll
clk: rockchip: delete the CLK_IGNORE_UNUSED from aclk_pcie on rk3399
clk: rockchip: add 65MHz and 106.5MHz rates to rk3399 plls used for HDMI

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clk: rockchip: add new clock-type for the ddrclk

Changing the rate of the DDR clock needs special care, as the DDR
is of course in use and will react badly if the rate changes under it.

Over time d

clk: rockchip: add new clock-type for the ddrclk

Changing the rate of the DDR clock needs special care, as the DDR
is of course in use and will react badly if the rate changes under it.

Over time different approaches to handle that were used.

Past SoCs like the rk3288 and before would store some code in SRAM
while the rk3368 used a SCPI variant and let a coprocessor handle that.

New rockchip platforms like the rk3399 have a dcf controller to do ddr
frequency scaling, and support for this controller will be implemented
in the arm-trusted-firmware.

This new clock-type should over time handle all these methods for
handling DDR rate changes, but right now it will concentrate on the
SIP interface used to talk to ARM trusted firmware.

The SIP interface counterpart was merged from pull-request #684 [0]
into the upstream arm-trusted-firmware codebase.

[0] https://github.com/ARM-software/arm-trusted-firmware/pull/684

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

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