History log of /linux/drivers/clk/qcom/lpasscc-sdm845.c (Results 26 – 37 of 37)
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# f5c7305d 20-Sep-2019 Stephen Boyd <sboyd@kernel.org>

Merge branches 'clk-qcom', 'clk-mtk', 'clk-armada', 'clk-ingenic' and 'clk-meson' into clk-next

- Support qcom SM8150 RPMh clks
- Set floor ops for qcom sd clks
- Support qcom QCS404 WCSS clks
-

Merge branches 'clk-qcom', 'clk-mtk', 'clk-armada', 'clk-ingenic' and 'clk-meson' into clk-next

- Support qcom SM8150 RPMh clks
- Set floor ops for qcom sd clks
- Support qcom QCS404 WCSS clks
- Support for Mediatek MT6779 SoCs
- Add CPU clock support for Armada 7K/8K (specifically AP806 and AP807)

* clk-qcom:
clk: qcom: rcg: Return failure for RCG update
clk: qcom: fix QCS404 TuringCC regmap
clk: qcom: clk-rpmh: Add support for SM8150
dt-bindings: clock: Document SM8150 rpmh-clock compatible
clk: qcom: clk-rpmh: Convert to parent data scheme
dt-bindings: clock: Document the parent clocks
clk: qcom: gcc: Use floor ops for SDCC clocks
clk: qcom: gcc-qcs404: Use floor ops for sdcc clks
clk: qcom: gcc-sdm845: Use floor ops for sdcc clks
clk: qcom: define probe by index API as common API
clk: qcom: Add WCSS gcc clock control for QCS404
clk: qcom: msm8916: Don't build by default
clk: qcom: gcc: Add global clock controller driver for SM8150
dt-bindings: clock: Document gcc bindings for SM8150
clk: qcom: clk-alpha-pll: Add support for Trion PLLs
clk: qcom: clk-alpha-pll: Remove post_div_table checks
clk: qcom: clk-alpha-pll: Remove unnecessary cast

* clk-mtk:
clk: mediatek: Runtime PM support for MT8183 mcucfg clock provider
clk: mediatek: Register clock gate with device
clk: mediatek: add pericfg clocks for MT8183
dt-bindings: clock: mediatek: add pericfg for MT8183
clk: mediatek: Add MT6779 clock support
clk: mediatek: Add dt-bindings for MT6779 clocks
dt-bindings: mediatek: bindings for MT6779 clk
clk: reset: Modify reset-controller driver

* clk-armada:
clk: mvebu: ap80x: add AP807 clock support
clk: mvebu: ap806: Prepare the introduction of AP807 clock support
clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driver
clk: mvebu: ap806: be more explicit on what SaR is
clk: mvebu: ap80x-cpu: add AP807 CPU clock support
clk: mvebu: ap806-cpu: prepare mapping of AP807 CPU clock
dt-bindings: ap806: Document AP807 clock compatible
dt-bindings: ap80x: Document AP807 CPU clock compatible
clk: mvebu: ap806: Fix clock name for the cluster
clk: mvebu: add CPU clock driver for Armada 7K/8K
clk: mvebu: add helper file for Armada AP and CP clocks
dt-bindings: ap806: add the cluster clock node in the syscon file

* clk-ingenic:
clk: ingenic: Use CLK_OF_DECLARE_DRIVER macro
clk: ingenic/jz4740: Fix "pll half" divider not read/written properly

* clk-meson: (23 commits)
clk: meson: g12a: add support for SM1 CPU 1, 2 & 3 clocks
clk: meson: g12a: add support for SM1 DynamIQ Shared Unit clock
clk: meson: g12a: add support for SM1 GP1 PLL
dt-bindings: clk: meson: add sm1 periph clock controller bindings
clk: meson: axg-audio: add g12a reset support
dt-bindings: clock: meson: add resets to the audio clock controller
clk: meson: g12a: expose CPUB clock ID for G12B
clk: meson: g12a: add notifiers to handle cpu clock change
clk: meson: add g12a cpu dynamic divider driver
clk: core: introduce clk_hw_set_parent()
clk: meson: remove clk input helper
clk: meson: remove ee input bypass clocks
clk: meson: clk-regmap: migrate to new parent description method
clk: meson: meson8b: migrate to the new parent description method
clk: meson: axg: migrate to the new parent description method
clk: meson: gxbb: migrate to the new parent description method
clk: meson: g12a: migrate to the new parent description method
clk: meson: remove ao input bypass clocks
clk: meson: axg-aoclk: migrate to the new parent description method
clk: meson: gxbb-aoclk: migrate to the new parent description method
...

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Revision tags: v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2
# 75e0a1e3 26-Jul-2019 Govind Singh <govinds@codeaurora.org>

clk: qcom: define probe by index API as common API

Extend the probe by index API in common code to be used
by other qcom clock controller.

Signed-off-by: Govind Singh <govinds@codeaurora.org>
Signe

clk: qcom: define probe by index API as common API

Extend the probe by index API in common code to be used
by other qcom clock controller.

Signed-off-by: Govind Singh <govinds@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Revision tags: v5.3-rc1
# 59747372 11-Jul-2019 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge branch 'next' into for-linus

Prepare input updates for 5.3 merge window.


Revision tags: v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1
# 2a267e7c 10-May-2019 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge tag 'v5.1' into next

Sync up with mainline to bring in the latest APIs.


Revision tags: v5.1, v5.1-rc7, v5.1-rc6
# 95d002e0 16-Apr-2019 Zhenyu Wang <zhenyuw@linux.intel.com>

Merge tag 'drm-intel-next-2019-04-04' into gvt-next

Merge back drm-intel-next for engine name definition refinement
and 54939ea0bd85 ("drm/i915: Switch to use HWS indices rather than addresses")
tha

Merge tag 'drm-intel-next-2019-04-04' into gvt-next

Merge back drm-intel-next for engine name definition refinement
and 54939ea0bd85 ("drm/i915: Switch to use HWS indices rather than addresses")
that would need gvt fixes to depend on.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

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Revision tags: v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6
# 82ffd045 07-Feb-2019 Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>

Merge tag 'v5.0-rc5' of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into fbdev-for-next

Linux 5.0-rc5

Sync with upstream (which now contains fbdev-v5.0-rc3 changes) to
prepare a

Merge tag 'v5.0-rc5' of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into fbdev-for-next

Linux 5.0-rc5

Sync with upstream (which now contains fbdev-v5.0-rc3 changes) to
prepare a base for fbdev-v5.1 changes.

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Revision tags: v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2
# 23d19ba0 11-Jan-2019 Maxime Ripard <maxime.ripard@bootlin.com>

Merge drm/drm-next into drm-misc-next

drm-next has been forwarded to 5.0-rc1, and we need it to apply the damage
helper for dirtyfb series from Noralf Trønnes.

Signed-off-by: Maxime Ripard <maxime.

Merge drm/drm-next into drm-misc-next

drm-next has been forwarded to 5.0-rc1, and we need it to apply the damage
helper for dirtyfb series from Noralf Trønnes.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

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# 49e41801 10-Jan-2019 James Morris <james.morris@microsoft.com>

Merge tag 'v5.0-rc1' into next-general

Linux 5.0-rc1

Sync to pick up LSM stacking work (which is based on -rc1).


# 3eb0930a 08-Jan-2019 Jani Nikula <jani.nikula@intel.com>

Merge drm/drm-next into drm-intel-next-queued

Generally catch up with 5.0-rc1, and specifically get the changes:

96d4f267e40f ("Remove 'type' argument from access_ok() function")
0b2c8f8b6b0c ("i91

Merge drm/drm-next into drm-intel-next-queued

Generally catch up with 5.0-rc1, and specifically get the changes:

96d4f267e40f ("Remove 'type' argument from access_ok() function")
0b2c8f8b6b0c ("i915: fix missing user_access_end() in page fault exception case")
594cc251fdd0 ("make 'user_access_begin()' do 'access_ok()'")

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

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Revision tags: v5.0-rc1
# 1fbb2dc6 25-Dec-2018 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This round is dominated by NXP's i.MX clk drivers. We gained support
for

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This round is dominated by NXP's i.MX clk drivers. We gained support
for two or three i.MX SoCs in here and that mostly means a lot of
driver code and data.

Beyond that platform, there are some new Mediatek, Amlogic, and
Qualcomm clk drivers added in here, and then we get to the long tail
of driver updates and non-critical fixes all around, including code
for vendors such as Renesas, Rockchip, Nvidia, and Allwinner. Overall,
the driver updates look normal.

Apart from the usual driver updates we have an update to make
registering OF based clk providers a little simpler when they're
devices created as a child of a device backed by a node in DT. Drivers
don't have to jump through hoops to unregister the provider upon
driver removal anymore because the API does the right thing and uses
the parent device DT node.

Summary:

Core:
- Make devm_of_clk_add_hw_provider() use parent dt node if necessary
- Various SPDX taggings
- Mark clk_ops const when possible

New Drivers:
- NXP i.MX7ULP SoC clock support
- NXP i.MX8QXP SoC clock support
- NXP i.MX8MQ SoC clock support
- NXP QorIQ T1023 SoC support
- Qualcomm SDM845 audio subsystem clks
- Qualcomm SDM845 GPU clck controllers
- Qualcomm QCS404 RPM clk support
- Mediatek MT7629 SoC clk controllers
- Allwinner F1c100s SoC clocks
- Allwinner H6 display engine clocks
- Amlogic GX video clocks
- Support for Amlogic meson8b CPU frequency scaling
- Amlogic Meson8b CPU post-divider clocks

Updates:
- Proper suspend/resume on VersaClock5
- Shrink code some with DEFINE_SHOW_ATTRIBUTE()
- Register fixes for Rockchip rk3188 and rk3328
- One new critical clock for Rockchip rk3188 and a fixed clock id
(double used number)
- New clock id for Rockchip rk3328
- Amlogic Meson8/Meson8b video clock support
- Amlogic got a clk-input helper and used it for the axg-audio clock
driver
- Sigma Delta modulation for the Allwinner A33 audio clocks
- Support for CPEX (timer) clocks on various Renesas R-Car Gen3 and
RZ/G2 SoCs
- Support for SDHI HS400 clocks on early revisions of Renesas R-Car
H3 and M3-W
- Support for SDHI and USB clocks on Renesas RZ/A2
- Support for RPC (SPI Multi I/O Bus Controller) clocks on Renesas
R-Car V3M
- Qualcomm MSM8998 GCC driver improvements (resets, drop unused clks,
etc)"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (172 commits)
clk: imx: imx7ulp: add arm hsrun mode clocks support
dt-bindings: clock: imx7ulp: add HSRUN mode related clocks
clk: Use of_node_name_eq for node name comparisons
clk: vc5: Add suspend/resume support
clk: qcom: Drop unused 8998 clock
clk: qcom: Leave mmss noc on for 8998
clk: tegra: Return the exact clock rate from clk_round_rate
clk: tegra30: Use Tegra CPU powergate helper function
soc/tegra: pmc: Drop SMP dependency from CPU APIs
clk: tegra: Fix maximum audio sync clock for Tegra124/210
clk: tegra: get rid of duplicate defines
clk: imx: add imx8qxp lpcg driver
clk: imx: add lpcg clock support
clk: imx: add imx8qxp clk driver
clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant
clk: imx: add scu clock common part
clk: imx: add configuration option for mmio clks
dt-bindings: clock: add imx8qxp lpcg clock binding
dt-bindings: clock: imx8qxp: add SCU clock IDs
clk: qcom: Add missing msm8998 resets
...

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Revision tags: v4.20, v4.20-rc7
# 3315fe5f 14-Dec-2018 Stephen Boyd <sboyd@kernel.org>

Merge branch 'clk-qcom-sdm845-lpass' into clk-next

- Qualcomm SDM845 audio subsystem clks

* clk-qcom-sdm845-lpass:
clk: qcom: Add lpass clock controller driver for SDM845
dt-bindings: clock: I

Merge branch 'clk-qcom-sdm845-lpass' into clk-next

- Qualcomm SDM845 audio subsystem clks

* clk-qcom-sdm845-lpass:
clk: qcom: Add lpass clock controller driver for SDM845
dt-bindings: clock: Introduce QCOM LPASS clock bindings
dt-bindings: clock: Update GCC bindings for protected-clocks

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Revision tags: v4.20-rc6, v4.20-rc5
# 8d3e5b9c 30-Nov-2018 Taniya Das <tdas@codeaurora.org>

clk: qcom: Add lpass clock controller driver for SDM845

Add support for the lpass clock controller found on SDM845 based devices.
This would allow lpass peripheral loader drivers to control the cloc

clk: qcom: Add lpass clock controller driver for SDM845

Add support for the lpass clock controller found on SDM845 based devices.
This would allow lpass peripheral loader drivers to control the clocks to
bring the subsystem out of reset.
LPASS clocks present on the global clock controller would be registered
with the clock framework based on the protected-clock flag. Also do not
gate these clocks if they are left unused, as the lpass clocks require
the global clock controller lpass clocks to be enabled before they are
accessed. Mark the GCC lpass clocks as CRITICAL, for the LPASS clock
access.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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