riscv: dts: starfive: Add mmc nodes on VisionFive 2 board

Add the mmc nodes for the StarFive JH7110 SoC.
Set mmc0 node to emmc and set mmc1 node to sd.

Signed-off-by: William Qiu <william.qiu@starf

riscv: dts: starfive: Add mmc nodes on VisionFive 2 board

Add the mmc nodes for the StarFive JH7110 SoC.
Set mmc0 node to emmc and set mmc1 node to sd.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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riscv: dts: starfive: enable DCDC1&ALDO4 node in axp15060

Enable DCDC1 node for vmmc-supply and enable ALDO4 node for
vqmmc-supply.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Signed-

riscv: dts: starfive: enable DCDC1&ALDO4 node in axp15060

Enable DCDC1 node for vmmc-supply and enable ALDO4 node for
vqmmc-supply.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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Merge drm/drm-next into drm-intel-next

Catching-up with drm-next and drm-intel-gt-next.
It will unblock a code refactor around the platform
definitions (names vs acronyms).

Signed-off-by: Rodrigo V

Merge drm/drm-next into drm-intel-next

Catching-up with drm-next and drm-intel-gt-next.
It will unblock a code refactor around the platform
definitions (names vs acronyms).

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Merge drm/drm-next into drm-intel-gt-next

Need to pull in b3e4aae612ec ("drm/i915/hdcp: Modify hdcp_gsc_message msg sending mechanism") as
a dependency for https://patchwork.freedesktop.org/series/1

Merge drm/drm-next into drm-intel-gt-next

Need to pull in b3e4aae612ec ("drm/i915/hdcp: Modify hdcp_gsc_message msg sending mechanism") as
a dependency for https://patchwork.freedesktop.org/series/121735/

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

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riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC

Add the quad spi controller node for the StarFive JH7110 SoC.

Co-developed-by: Ziv Xu <ziv.xu@starfivetech.com>
Signed-off-by:

riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC

Add the quad spi controller node for the StarFive JH7110 SoC.

Co-developed-by: Ziv Xu <ziv.xu@starfivetech.com>
Signed-off-by: Ziv Xu <ziv.xu@starfivetech.com>
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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riscv: dts: starfive: jh7110: add the node and pins configuration for tdm

Add the tdm controller node and pins configuration of tdm for the
StarFive JH7110 SoC.

Reviewed-by: Hal Feng <hal.feng@star

riscv: dts: starfive: jh7110: add the node and pins configuration for tdm

Add the tdm controller node and pins configuration of tdm for the
StarFive JH7110 SoC.

Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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riscv: dts: starfive: Add spi node and pins configuration

Add StarFive JH7110 SPI controller node and pins configuration on
VisionFive 2 board.

Signed-off-by: William Qiu <william.qiu@starfivetech.

riscv: dts: starfive: Add spi node and pins configuration

Add StarFive JH7110 SPI controller node and pins configuration on
VisionFive 2 board.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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riscv: dts: starfive: Add USB dts node for JH7110

Add USB wrapper layer and Cadence USB3 controller dts
configuration for StarFive JH7110 SoC and VisionFive2
Board.

Signed-off-by: Minda Chen <minda

riscv: dts: starfive: Add USB dts node for JH7110

Add USB wrapper layer and Cadence USB3 controller dts
configuration for StarFive JH7110 SoC and VisionFive2
Board.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy

v1.3B:
v1.3B uses motorcomm YT8531(rgmii-id phy) x2, need delay and
inverse configurations.
The tx_clk of v1.3B uses an ex

riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy

v1.3B:
v1.3B uses motorcomm YT8531(rgmii-id phy) x2, need delay and
inverse configurations.
The tx_clk of v1.3B uses an external clock and needs to be
switched to an external clock source.

v1.2A:
v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
configurations.
v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
switch rx and rx to external clock sources.

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
[conor: squashed a fix from Samin to use the actual properties]
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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Merge drm/drm-next into drm-misc-next

Backmerging to get v6.5-rc2.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks

Add DVP and HDMI TX pixel external fixed clocks and the rates are
74.25MHz and 297MHz.

Acked-by: Palmer Dabbelt <palmer@rivos

riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks

Add DVP and HDMI TX pixel external fixed clocks and the rates are
74.25MHz and 297MHz.

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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Merge tag 'v6.4' into next

Sync up with mainline to bring in updates to shared infrastructure.

ASoC: Merge v6.5-rc2

Get a similar baseline to my other branches, and fixes for people using
the branch.

Merge v6.5-rc1 into drm-misc-fixes

Boris needs 6.5-rc1 in drm-misc-fixes to prevent a conflict.

Signed-off-by: Maxime Ripard <mripard@kernel.org>

Merge branch 'master' into mm-hotfixes-stable

Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
"The biggest change this time is for the 32-bit devicetree files,

Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
"The biggest change this time is for the 32-bit devicetree files, which
are all moved to a new location, using separate subdirectories for
each SoC vendor, following the same scheme that is used on arm64, mips
and riscv. This has been discussed for many years, but so far we never
did this as there was a plan to move the files out of the kernel
entirely, which has never happened.

The impact of this will be that all external patches no longer apply,
and anything depending on the location of the dtb files in the build
directory will have to change. The installed files after 'make
dtbs_install' keep the current location.

There are six added SoCs here that are largely variants of previously
added chips. Two other chips are added in a separate branch along with
their device drivers.

- The Samsung Exynos 4212 makes its return after the Samsung Galaxy
Express phone is addded at last. The SoC support was originally
added in 2012 but removed again in 2017 as it was unused at the
time.

- Amlogic C3 is a Cortex-A35 based smart IP camera chip

- Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
the still common MSM8916 (Snapdragon 410) phone chip that has been
supported for a long time.

- Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
laptop chips, used in the Lenovo Flex 5G, which is added along with
the reference board.

- Qualcomm SDX75 is the latest generation modem chip that is used as
a peripherial in phones but can also run a standalone Linux. Unlike
the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.

- Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the
Xuantie C910 core, a step up from all previously added rv64 chips.

All of the above come with reference board implementations, those
included there are 39 new board files, but only five more 32-bit this
time, probably a new low:

- Marantec Maveo board based on dhcor imx6ull module

- Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip

- Epson Moverio BT-200 AR glasses based on TI OMAP4

- PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM

- ICnova ADB4006 board based on Allwinner A20

On the 64-bit side, there are also fewer addded machines than we had
in the recent releases:

- Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM
EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device.

- NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234

- Qualcomm gains support for 6 reference boards on various members of
their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua
phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top
of the various reference platforms for their new chips.

- Rockchips support for several newer boards: Indiedroid Nova
(rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM
NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn
Fastrhino R66S/R68S (rk3568)

- TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex
Verdin family with AM62 COM, carrier and dev boards

Other changes to existing boards contain the usual minor improvements
along with

- continued updates to clean up dts files based on dtc warnings and
binding checks, in particular cache properties and node names

- support for devicetree overlays on at91, bcm283x

- significant additions to existing SoC support on mediatek,
qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST
STM32MP1

As usual, a lot more detail is available in the individual merge
commits"

* tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits)
ARM: mvebu: fix unit address on armada-390-db flash
ARM: dts: Move .dts files to vendor sub-directories
kbuild: Support flat DTBs install
ARM: dts: Add .dts files missing from the build
ARM: dts: allwinner: Use quoted #include
ARM: dts: lan966x: kontron-d10: add PHY interrupts
ARM: dts: lan966x: kontron-d10: fix SPI CS
ARM: dts: lan966x: kontron-d10: fix board reset
ARM: dts: at91: Enable device-tree overlay support for AT91 boards
arm: dts: Enable device-tree overlay support for AT91 boards
arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller
ARM: dts: at91: use generic name for shutdown controller
ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
dt-bindings: firmware: brcm,kona-smc: convert to YAML
riscv: dts: sort makefile entries by directory
riscv: defconfig: enable T-HEAD SoC
MAINTAINERS: add entry for T-HEAD RISC-V SoC
riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
riscv: dts: add initial T-HEAD TH1520 SoC device tree
riscv: Add the T-HEAD SoC family Kconfig option
...

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Merge tag 'riscv-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt

RISC-V Devicetrees for v6.5

StarFive:
Watchdog nodes for both the JH7110 & its forerunner, t

Merge tag 'riscv-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt

RISC-V Devicetrees for v6.5

StarFive:
Watchdog nodes for both the JH7110 & its forerunner, the JH7100. PMU, P
being power, support for the JH7110. PMIC and frequency scaling support
for the JH7110 equipped VisionFive 2.
Most of the DT bits for the JH7110, and the SBCs using it, are pending
support for one of the clock controllers, so it's a smaller set of
changes than I would have hoped for.

Misc:
Pick up some dt-binding cleanup that Palmer assigned to me & had no
uptake from the respective maintainers. My powers of estimation failed
me again, with part of my motivation for picking them up being the
addition of new platforms that ended up not making it. Hopefully next
window for those, as they were relatively close.
Exclude the Allwinner and Renesas subdirectories from the Misc.
MAINTAINERS entry, since I do not take care of those.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: starfive: Add cpu scaling for JH7110 SoC
riscv: dts: starfive: Enable axp15060 pmic for cpufreq
dt-bindings: interrupt-controller: sifive,plic: Sort compatible values
dt-bindings: timer: sifive,clint: Clean up compatible value section
riscv: dts: starfive: jh7110: Add watchdog node
riscv: dts: starfive: jh7100: Add watchdog node
riscv: dts: starfive: Add PMU controller node
MAINTAINERS: exclude maintained subdirs in RISC-V misc DT entry

Link: https://lore.kernel.org/r/20230612-fasting-floss-0bc05a08bc7a@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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Merge drm/drm-next into drm-misc-next-fixes

Backmerging to sync drm-misc-next-fixes with drm-misc-next.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge branch 'drm-next' of git://anongit.freedesktop.org/drm/drm into msm-next-lumag-base

Merge the drm-next tree to pick up the DRM DSC helpers (merged via
drm-intel-next tree). MSM DSC v1.2 patche

Merge branch 'drm-next' of git://anongit.freedesktop.org/drm/drm into msm-next-lumag-base

Merge the drm-next tree to pick up the DRM DSC helpers (merged via
drm-intel-next tree). MSM DSC v1.2 patches depend on these helpers.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

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riscv: dts: starfive: Add cpu scaling for JH7110 SoC

Add the operating-points-v2 to support cpu scaling on StarFive JH7110 SoC.
It supports up to 4 cpu frequency loads.

Signed-off-by: Mason Huo <ma

riscv: dts: starfive: Add cpu scaling for JH7110 SoC

Add the operating-points-v2 to support cpu scaling on StarFive JH7110 SoC.
It supports up to 4 cpu frequency loads.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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riscv: dts: starfive: Enable axp15060 pmic for cpufreq

The VisionFive 2 board has an embedded pmic axp15060,
which supports the cpu DVFS through the dcdc2 regulator.
This patch enables axp15060 pmic

riscv: dts: starfive: Enable axp15060 pmic for cpufreq

The VisionFive 2 board has an embedded pmic axp15060,
which supports the cpu DVFS through the dcdc2 regulator.
This patch enables axp15060 pmic and configs the dcdc2.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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Merge tag 'v6.4-rc4' into wpan-next/staging

Linux 6.4-rc4

Merge drm/drm-next into drm-intel-gt-next

For conflict avoidance we need the following commit:

c9a9f18d3ad8 drm/i915/huc: use const struct bus_type pointers

Signed-off-by: Tvrtko Ursulin <tvrtko

Merge drm/drm-next into drm-intel-gt-next

For conflict avoidance we need the following commit:

c9a9f18d3ad8 drm/i915/huc: use const struct bus_type pointers

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

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Merge drm/drm-next into drm-intel-next

Backmerge to get some hwmon dependencies.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Merge drm/drm-fixes into drm-misc-fixes

Let's bring 6.4-rc1 in drm-misc-fixes to start the new fix cycle.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>