| 73f2b940 | 01-Oct-2019 |
Alexandre GRIVEAUX <agriveaux@deutnet.info> |
MIPS: CI20: DTS: Add I2C nodes
Adding missing I2C nodes and some peripheral:
- PMU
- RTC
Signed-off-by: Alexandre GRIVEAUX <agriveaux@deutnet.info>
Signed-off-by: Paul Burton <paul.burton@mips.com>
MIPS: CI20: DTS: Add I2C nodes
Adding missing I2C nodes and some peripheral:
- PMU
- RTC
Signed-off-by: Alexandre GRIVEAUX <agriveaux@deutnet.info>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: robh+dt@kernel.org
Cc: mark.rutland@arm.com
Cc: ralf@linux-mips.org
Cc: jhogan@kernel.org
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
show more ...
|
| 967a7100 | 24-Jul-2019 |
Paul Cercueil <paul@crapouillou.net> |
MIPS: GCW0: Reduce system timer and clocksource to 750 kHz
The default clock (12 MHz) is too fast for the system timer.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malate
MIPS: GCW0: Reduce system timer and clocksource to 750 kHz
The default clock (12 MHz) is too fast for the system timer.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: od@zcrc.me
show more ...
|
| 157c887a | 24-Jul-2019 |
Paul Cercueil <paul@crapouillou.net> |
MIPS: CI20: Reduce system timer and clocksource to 3 MHz
The default clock (48 MHz) is too fast for the system timer.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterr
MIPS: CI20: Reduce system timer and clocksource to 3 MHz
The default clock (48 MHz) is too fast for the system timer.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: od@zcrc.me
show more ...
|
| a68d3b05 | 24-Jul-2019 |
Paul Cercueil <paul@crapouillou.net> |
MIPS: qi_lb60: Reduce system timer and clocksource to 750 kHz
The default clock (12 MHz) is too fast for the system timer, which fails
to report time accurately.
Signed-off-by: Paul Cercueil <paul@
MIPS: qi_lb60: Reduce system timer and clocksource to 750 kHz
The default clock (12 MHz) is too fast for the system timer, which fails
to report time accurately.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: od@zcrc.me
show more ...
|
| 8ddebad1 | 26-Jul-2019 |
Paul Cercueil <paul@crapouillou.net> |
MIPS: qi_lb60: Migrate to devicetree
Move all the platform data to devicetree.
The only bit dropped is the PWM beeper, which requires the PWM driver
to be updated. I figured it's okay to remove it
MIPS: qi_lb60: Migrate to devicetree
Move all the platform data to devicetree.
The only bit dropped is the PWM beeper, which requires the PWM driver
to be updated. I figured it's okay to remove it here since it's really
a non-critical device, and it'll be re-introduced soon enough.
The other change is the CS line of the SPI is now set as active low. The
SPI core would have forced "active low" anyway, unless the 'spi-cs-high'
property is set.
In the process of moving to devicetree, we also switched to new drivers:
- We use the simple-audio-card and simple-amplifier drivers instead of
the custom ASoC code;
- We use the new Ingenic DRM driver coupled with the GiantPlus GPM940B0
DRM panel driver instead of the old framebuffer driver;
- We use the new jz4780-dma driver instead of the old jz4740-dma one;
- We use the ingenic-nand and jz4740-ecc drivers instead of the old
jz4740-nand driver;
- We use ingenic-battery instead of jz4740-battery;
- We use iio-hwmon instead of jz4740-hwmon;
- We use ingenic-iio instead of the old jz4740-adc MFD driver.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
[paul.burton@mips.com:
Drop the unused & undocumented ili8960 spi@0 node.]
Signed-off-by: Paul Burton <paul.burton@mips.com>
show more ...
|
| 1ca1c87f | 24-Jan-2019 |
Zhou Yanjie <zhouyanjie@cduestc.edu.cn> |
DTS: CI20: Fix bugs in ci20's device tree.
According to the Schematic, the hardware of ci20 leads to uart3,
but not to uart2. Uart2 is miswritten in the original code.
Signed-off-by: Zhou Yanjie <z
DTS: CI20: Fix bugs in ci20's device tree.
According to the Schematic, the hardware of ci20 leads to uart3,
but not to uart2. Uart2 is miswritten in the original code.
Signed-off-by: Zhou Yanjie <zhouyanjie@cduestc.edu.cn>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips <linux-mips@vger.kernel.org>
Cc: linux-kernel <linux-kernel@vger.kernel.org>
Cc: devicetree@vger.kernel.org
Cc: robh+dt@kernel.org
Cc: ralf@linux-mips.org
Cc: jhogan@kernel.org
Cc: mark.rutland@arm.com
Cc: malat@debian.org
Cc: ezequiel@collabora.co.uk
Cc: ulf.hansson@linaro.org
Cc: syq <syq@debian.org>
Cc: jiaxun.yang <jiaxun.yang@flygoat.com>
show more ...
|
| d426c517 | 29-Aug-2018 |
Paul Cercueil <paul@crapouillou.net> |
MIPS: JZ4740: DTS: Add DMA nodes
Add the devicetree nodes for the DMA core of the JZ4740 SoC, disabled
by default, as currently there are no clients for the DMA driver
(until the MMC driver and/or o
MIPS: JZ4740: DTS: Add DMA nodes
Add the devicetree nodes for the DMA core of the JZ4740 SoC, disabled
by default, as currently there are no clients for the DMA driver
(until the MMC driver and/or others get a devicetree node).
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
show more ...
|
| 6b5b368b | 29-Aug-2018 |
Paul Cercueil <paul@crapouillou.net> |
MIPS: JZ4770: DTS: Add DMA nodes
Add the two devicetree nodes for the two DMA cores of the JZ4770 SoC,
disabled by default, as currently there are no clients for the DMA
driver (until the MMC driver
MIPS: JZ4770: DTS: Add DMA nodes
Add the two devicetree nodes for the two DMA cores of the JZ4770 SoC,
disabled by default, as currently there are no clients for the DMA
driver (until the MMC driver and/or others get a devicetree node).
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
show more ...
|
| 9a0225d9 | 10-May-2018 |
Paul Cercueil <paul@crapouillou.net> |
MIPS: JZ4780: dts: Fix watchdog node
- The previous node requested a memory area of 0x100 bytes, while the
driver only manipulates four registers present in the first 0x10 bytes.
- The driver req
MIPS: JZ4780: dts: Fix watchdog node
- The previous node requested a memory area of 0x100 bytes, while the
driver only manipulates four registers present in the first 0x10 bytes.
- The driver requests for the "rtc" clock, but the previous node did not
provide any.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Mathieu Malaterre <malat@debian.org>
Acked-by: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Wim Van Sebroeck <wim@linux-watchdog.org>
Cc: Mathieu Malaterre <malat@debian.org>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-watchdog@vger.kernel.org
Signed-off-by: James Hogan <jhogan@kernel.org>
show more ...
|
| 671963bb | 28-Mar-2018 |
Ezequiel Garcia <ezequiel@collabora.co.uk> |
MIPS: dts: ci20: Enable MMC in the devicetree
Now that we have support for JZ480 SoCs in the MMC driver,
let's enable it on the devicetree.
Acked-by: James Hogan <jhogan@kernel.org>
Tested-by: Math
MIPS: dts: ci20: Enable MMC in the devicetree
Now that we have support for JZ480 SoCs in the MMC driver,
let's enable it on the devicetree.
Acked-by: James Hogan <jhogan@kernel.org>
Tested-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.co.uk>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
|
| 7f5a07f4 | 28-Mar-2018 |
Ezequiel Garcia <ezequiel@collabora.co.uk> |
MIPS: dts: jz4780: Add MMC controller node to the devicetree
Add the devicetree node to support the MMC host controller
available in JZ480 SoCs.
Acked-by: James Hogan <jhogan@kernel.org>
Tested-by:
MIPS: dts: jz4780: Add MMC controller node to the devicetree
Add the devicetree node to support the MMC host controller
available in JZ480 SoCs.
Acked-by: James Hogan <jhogan@kernel.org>
Tested-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.co.uk>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
show more ...
|
| 018eab88 | 24-Jan-2018 |
Mathieu Malaterre <malat@debian.org> |
MIPS: dts: Fix a typo in the node unit name
The unit name was 8c00000 but since the reg property is declared as:
reg = <0x0 0x4c00000 0x1 0xfb400000>;
the unit name should have been instead 4c00
MIPS: dts: Fix a typo in the node unit name
The unit name was 8c00000 but since the reg property is declared as:
reg = <0x0 0x4c00000 0x1 0xfb400000>;
the unit name should have been instead 4c00000.
Tested on MIPS Creator CI20 (v1):
$ cat /sys/firmware/devicetree/.../partitions/partition@4c00000/label;echo
system
Reported-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Paul Cercueil <paul@crapouillou.net>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/18529/
Signed-off-by: James Hogan <jhogan@kernel.org>
show more ...
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