History log of /linux/Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml (Results 26 – 30 of 30)
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# cf36ae3e 17-Aug-2022 Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-fixes into drm-misc-fixes

Backmerging for v6.0-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>


Revision tags: v6.0-rc1
# 3976d758 02-Aug-2022 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM DT updates from Arnd Bergmann:
"As usual, the bulk of the changes for the SoC tree are devicetree file
upd

Merge tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM DT updates from Arnd Bergmann:
"As usual, the bulk of the changes for the SoC tree are devicetree file
updates, and most of these changes are for 64-bit embedded machines.
As before, there are a ton of style cleanups, and additional hardware
support for existing machines.

Looking only at the new SoC, the notable additions are:

- A whole family of Broadcom broadband SoCs, both 32-bit and 64-bit:
BCM63178, BCM63158, BCM4912, BCM6858, BCM6878, BCM6846, BCM63146,
BCM6856, BCM6855, BCM6756, BCM63148, and BCM6813. Each SoC comes
with a corresponding reference board.

- The new NXP i.MX93 SoC, the follow-up to the popular i.MX6 and
i.MX8 embedded SoCs, now using Cortex-A55 cores and the Ethos-U65
NPU.

- Qualcomm Snapdragon 8cx Gen3 (SC8280XP), the current high end of
Arm based Laptop SoCs, and its automotive cousin, the SA8540P. The
SC8280XP is used in the Lenovo Thinkpad X13s laptop that also gets
added here in addition to the reference boards.

- Allwinner H616, a newer version of the H6 SoC, targeted at
Set-top-box applications. It comes with dts files for the Orange Pi
zero2 single-board computer and the X96 Mate set-top-box

- Marvell Prestera 98DX2530 (AlleyCat5), a network switch chip in the
Armada SoC family based on the Cortex-A55 core.

New machines based on previously supported SoCs include:

- Several new machines on NXP i.MX platforms: multiple Toradex
Colibri boards using the "Iris" and "Ixora" carriers, DH
electronics i.MX8M Plus DHCOM and PDK2, TQ-Systems TQMa8MPQL, and
phytech phyBOARD-Polis-i.MX8MM.

- Google Chameleon v3 FPGA board based on Intel Arria10 and Stratix
10 Software Virtual platform, both in the SoCFPGA platform.

- Two new wireless devices based on Broadcom SoCs: The Asus GT-AX6000
Router and the Cisco Meraki MR26 access point

- Improved Chromebook support for both the Mediatek and Qualcomm SoC
families brought added machines: Acer Chromebook 514 (MT8192), Acer
Chromebook Spin 513 (MT8195) and a couple of SC7180 based machines
including the Lenovo IdeaPad Chromebook Duet 3.

- Xiaomi Mi Mix2s, LG G7 and LG V35 are mobile phones based on
Qualcomm SDM845, while Mi 5s Plus is based on MSM8996.

- Finally, there are a few development board on other chips: PCB8309
(Microchip lan966x), Radxa Rock Pi S (Rockchips RK3308) DH DRC
Compact (ST STM32MP1) and Inforce IFC6560 (Qualcomm SDM660)"

* tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (829 commits)
dt-bindings: soc: bcm: use absolute path to other schema
dt-bindings: soc: bcm: drop quotes when not needed
dt-bindings: soc: microchip: use absolute path to other schema
dt-bindings: soc: microchip: drop quotes when not needed
ARM: dts: lan966x: keep lan966 entries alphabetically sorted
ARM: dts: lan966x: add support for pcb8309
dt-bindings: arm: at91: add lan966 pcb8309 board
ARM: dts: lan966x: Enable network driver on pcb8291
ARM: dts: lan966x: Disable can0 on pcb8291
ARM: dts: lan966x: Add gpio-restart
dt-bindings: arm: aspeed: add Aspeed Evaluation boards
arm64: dts: qcom: Add support for Xiaomi Mi Mix2s
dt-bindings: arm: qcom: Add Xiaomi Mi Mix2s bindings
dt-bindings: arm: qcom: Document lg,judyln and lg,judyp devices
dt-bindings: arm: qcom: add missing SM6350 board compatibles
dt-bindings: arm: qcom: add missing SM6125 board compatibles
dt-bindings: arm: qcom: add missing SDM845 board compatibles
dt-bindings: arm: qcom: add missing SDM636 board compatibles
dt-bindings: arm: qcom: add missing SDM630 board compatibles
dt-bindings: arm: qcom: add missing QCS404 board compatibles
...

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Revision tags: v5.19, v5.19-rc8, v5.19-rc7
# a41bf1aa 11-Jul-2022 Arnd Bergmann <arnd@arndb.de>

Merge tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.20-rc1

These changes add clock, reset, memory client and

Merge tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.20-rc1

These changes add clock, reset, memory client and power domain
definitions for various devices found on Tegra234 along with a few
device tree bindings for new hardware.

* tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: tegra-ccplex-cluster: Remove status from required properties
dt-bindings: Add headers for Host1x and VIC on Tegra234
dt-bindings: timer: Add Tegra186 & Tegra234 Timer
dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB 2.0 binding
dt-bindings: arm: tegra: Add NVIDIA Tegra194 AXI2APB binding
dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB 1.0 binding
dt-bindings: memory: Add Tegra234 MGBE memory clients
dt-bindings: Add Tegra234 MGBE clocks and resets
dt-bindings: power: Add Tegra234 MGBE power domains
dt-bindings: Add headers for Tegra234 GPCDMA

Link: https://lore.kernel.org/r/20220708185608.676474-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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Revision tags: v5.19-rc6
# bd8e9cf3 08-Jul-2022 Thierry Reding <treding@nvidia.com>

Merge branch 'for-5.20/dt-bindings' into for-5.20/arm64/dt


# dd92b16c 04-Jul-2022 Kartik <kkartik@nvidia.com>

dt-bindings: timer: Add Tegra186 & Tegra234 Timer

The Tegra186 timer provides ten 29-bit timer counters and one 32-bit
timestamp counter. The Tegra234 timer provides sixteen 29-bit timer
counters an

dt-bindings: timer: Add Tegra186 & Tegra234 Timer

The Tegra186 timer provides ten 29-bit timer counters and one 32-bit
timestamp counter. The Tegra234 timer provides sixteen 29-bit timer
counters and one 32-bit timestamp counter. Each NV timer selects its
timing reference signal from the 1 MHz reference generated by USEC,
TSC or either clk_m or OSC. Each TMR can be programmed to generate
one-shot, periodic, or watchdog interrupts.

Signed-off-by: Kartik <kkartik@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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