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dd65b964 |
| 02-Aug-2022 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM new SoC support from Arnd Bergmann: "This adds initial support for two SoC families that have been under
Merge tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM new SoC support from Arnd Bergmann: "This adds initial support for two SoC families that have been under review for a while. In both cases, the origonal idea was to have a minimally functional version, but we ended up leaving out the clk drivers that are still under review and will be merged through the corresponding subsystem tree.
The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and based on the 32-bit NPCM7xx family but is now getting added to arch/arm64 as well.
Sunplus SP7021, also known as Plus1, is a general-purpose System-in-Package design based on the 32-bit Cortex-A7 SoC on the main chip, plus an I/O chip and memory in the same"
* tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits) MAINTAINERS: rectify entry for ARM/NUVOTON NPCM ARCHITECTURE arm64: defconfig: Add Nuvoton NPCM family support arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add maintainer reset: npcm: Add NPCM8XX support dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: using syscon instead of device data ARM: dts: nuvoton: add reset syscon property dt-bindings: reset: npcm: add GCR syscon property dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock dt-bindings: watchdog: npcm: Add npcm845 compatible string dt-bindings: timer: npcm: Add npcm845 compatible string ARM: dts: Add Sunplus SP7021-Demo-V3 board device tree ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig ARM: sunplus: Add initial support for Sunplus SP7021 SoC irqchip: Add Sunplus SP7021 interrupt controller driver ...
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7cb7b8fe |
| 18-Jul-2022 |
Arnd Bergmann <arnd@arndb.de> |
Merge branch 'sunplus/newsoc' into arm/newsoc
Merge "Sunplus SP7021 SoC support" from Qin Jian, applied as patches:
"Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates many pe
Merge branch 'sunplus/newsoc' into arm/newsoc
Merge "Sunplus SP7021 SoC support" from Qin Jian, applied as patches:
"Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates many peripherals (ex: UART, I2C, SPI, SDIO, eMMC, USB, SD card and etc.) into a single chip. It is designed for industrial control.
SP7021 consists of two chips (dies) in a package. One is called C-chip (computing chip). It is a 4-core ARM Cortex A7 CPU. It adopts high-level process (22 nm) for high performance computing. The other is called P- chip (peripheral chip). It has many peripherals and an ARM A926 added especially for real-time control. P-chip is made for customers. It adopts low-level process (ex: 0.11 um) to reduce cost.
Refer to (for documentations): https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview
Refer to (applications): https://tibbo.com/store/plus1.html
Refer to (applications): http://www.sinovoip.com.cn/ecp_view.asp?id=586"
I left out the clock controller driver, which is still not fully reviewed. There have been 20 revisions of the platform code, and everything else looks good enough, so I hope it's we can simplify the process by separating it out again.
Link: https://lore.kernel.org/linux-arm-kernel/0c10fa4ccf3da5d92784b9bbd4177d1d2f1d62a0.1656396767.git.qinjian@cqplus1.com/
* sunplus/newsoc: ARM: dts: Add Sunplus SP7021-Demo-V3 board device tree ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig ARM: sunplus: Add initial support for Sunplus SP7021 SoC irqchip: Add Sunplus SP7021 interrupt controller driver dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller dt-bindings: clock: Add bindings for SP7021 clock driver reset: Add Sunplus SP7021 reset driver dt-bindings: reset: Add bindings for SP7021 reset driver dt-bindings: arm: sunplus: Add bindings for Sunplus SP7021 SoC boards
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55bfc376 |
| 28-Jun-2022 |
Qin Jian <qinjian@cqplus1.com> |
dt-bindings: reset: Add bindings for SP7021 reset driver
Add documentation to describe Sunplus SP7021 reset driver bindings.
Signed-off-by: Qin Jian <qinjian@cqplus1.com> Reviewed-by: Rob Herring <
dt-bindings: reset: Add bindings for SP7021 reset driver
Add documentation to describe Sunplus SP7021 reset driver bindings.
Signed-off-by: Qin Jian <qinjian@cqplus1.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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