History log of /linux/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml (Results 26 – 29 of 29)
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# 073350da 07-Jun-2022 Mark Brown <broonie@kernel.org>

Merge tag 'v5.19-rc1' into asoc-5.19

Linux 5.19-rc1


Revision tags: v5.19-rc1
# 907bb57a 28-May-2022 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
"Pretty big this time. Mostly due to (nice) Renesas re

Merge tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
"Pretty big this time. Mostly due to (nice) Renesas refactorings.

Core changes:

- New helpers from Andy such as for_each_gpiochip_node() affecting
both GPIO and pin control, improving a bunch of drivers in the
process.

- Pulled in Marc Zyngiers work to make IRQ chips immutable, and
started to apply fixups on top.

New drivers:

- New driver for Marvell MVEBU 98DX2530.

- New driver for Mediatek MT8195.

- Support Qualcomm PMX65 and PM6125.

- New driver for Qualcomm SC7280 LPASS pin control.

- New driver for Rockchip RK3588.

- New driver for NXP Freescale i.MXRT1170.

- New driver for Mediatek MT6795 Helio X10.

Improvements:

- Several Aspeed G6 cleanups and non-critical fixes.

- Thorought refactoring of some of the ever improving Renesas
drivers.

- Clean up Mediatek MT8192 bindings a bit.

- PWM output and clock monitoring in the Ocelot LAN966x driver.

- Thorough refactoring and cleanup of the Ralink drivers such as
RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into
proper sub-drivers"

* tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (161 commits)
pinctrl: apple: Use a raw spinlock for the regmap
pinctrl: berlin: bg4ct: Use devm_platform_*ioremap_resource() APIs
pinctrl: intel: Fix kernel doc format, i.e. add return sections
dt-bindings: pinctrl: qcom: Drop 'maxItems' on 'wakeup-parent'
pinctrl: starfive: Make the irqchip immutable
pinctrl: mediatek: Add pinctrl driver for MT6795 Helio X10
dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings
pinctrl: freescale: Add i.MXRT1170 pinctrl driver support
dt-bindings: pinctrl: add i.MXRT1170 pinctrl Documentation
dt-bindings: pinctrl: rockchip: increase max amount of device functions
dt-bindings: pinctrl: qcom,pmic-gpio: add 'gpio-reserved-ranges'
dt-bindings: pinctrl: qcom,pmic-gpio: add 'input-disable'
dt-bindings: pinctrl: qcom,pmic-gpio: describe gpio-line-names
dt-bindings: pinctrl: qcom,pmic-gpio: fix matching pin config
dt-bindings: pinctrl: qcom,pmic-gpio: document PM8150L and PMM8155AU
pinctrl: qcom: spmi-gpio: Add pm6125 compatible
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm6125 compatible
pinctrl: intel: Drop unused irqchip member in struct intel_pinctrl
pinctrl: intel: make irq_chip immutable
pinctrl: cherryview: Use GPIO chip pointer in chv_gpio_irq_mask_unmask()
...

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Revision tags: v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4
# 9c1082fd 20-Apr-2022 Michael Walle <michael@walle.cc>

dt-bindings: pinctrl: ocelot: add reset property

On the LAN966x SoC the GPIO controller will be resetted together with
the SGPIO and the switch core. Add a phandle to register the shared
reset line.

dt-bindings: pinctrl: ocelot: add reset property

On the LAN966x SoC the GPIO controller will be resetted together with
the SGPIO and the switch core. Add a phandle to register the shared
reset line.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220420191926.3411830-2-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

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Revision tags: v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17
# 61b23e48 19-Mar-2022 Michael Walle <michael@walle.cc>

dt-bindings: pinctrl: convert ocelot-pinctrl to YAML format

Convert the ocelot-pinctrl device tree binding to the new YAML format.

Additionally to the original binding documentation, add interrupt

dt-bindings: pinctrl: convert ocelot-pinctrl to YAML format

Convert the ocelot-pinctrl device tree binding to the new YAML format.

Additionally to the original binding documentation, add interrupt
properties which are optional and already used on several SoCs like
SparX-5, Luton, Ocelot and LAN966x but were not documented before.

Also, on the sparx5 and the lan966x SoCs there are two items for the
reg property.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20220319204628.1759635-7-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

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