intrng: Add support for multiple interrupt roots

Different types of interrupts may require using different exception
vectors so this commit adds support multiple interrupt roots to handle
these case

intrng: Add support for multiple interrupt roots

Different types of interrupts may require using different exception
vectors so this commit adds support multiple interrupt roots to handle
these cases. Archs may opt-in to multiple interrupt roots by defining
INTR_ROOT_NUM as the number of roots in their intr.h. Based off
https://reviews.freebsd.org/D40161.

Signed-off-by: Ayrton Munoz <a.munoz3327@gmail.com>
Co-authored-by: Kyle Evans <kevans@FreeBSD.org>
Co-authored-by: Andrew Turner <andrew@FreeBSD.org>
Reviewed-by: imp,mmel,mhorne
Pull-Request: https://github.com/freebsd/freebsd-src/pull/1363

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riscv: Convert local interrupt controller to a newbus PIC

Currently the local interrupt controller implementation is based on
pre-INTRNG arm/arm64 code, using hand-rolled event code rather than
INTR

riscv: Convert local interrupt controller to a newbus PIC

Currently the local interrupt controller implementation is based on
pre-INTRNG arm/arm64 code, using hand-rolled event code rather than
INTRNG. This then interacts weirdly with the PLIC, and other future
interrupt controllers like the APLIC and IMSICs in the upcoming AIA
specification, since they become the root PIC despite not being the
logical root. Instead, use a real newbus device for it and register
it as the root PIC.

This also adapts the IPI code to make use of the newly-added INTRNG
generic IPI handling framework, adding a new sbi_ipi as the PIC. In
future there will be alternative devices for sending IPIs that will
register with higher priorities, such as the proposed AIA IMSIC and
ACLINT SSWI.

Reviewed by: mhorne
MFC after: 1 month
Differential Revision: https://reviews.freebsd.org/D35901

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