Revision tags: release/14.0.0 |
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95ee2897 |
| 16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove $FreeBSD$: two-line .h pattern
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
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Revision tags: release/13.2.0, release/12.4.0, release/13.1.0, release/12.3.0, release/13.0.0 |
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78599c32 |
| 05-Dec-2020 |
Conrad Meyer <cem@FreeBSD.org> |
Add CFI start/end proc directives to arm64, i386, and ppc
Follow-up to r353959 and r368070: do the same for other architectures.
arm32 already seems to use its own .fnstart/.fnend directives, which
Add CFI start/end proc directives to arm64, i386, and ppc
Follow-up to r353959 and r368070: do the same for other architectures.
arm32 already seems to use its own .fnstart/.fnend directives, which appear to be ARM-specific variants of the same thing. Likewise, MIPS uses .frame directives.
Reviewed by: arichardson Differential Revision: https://reviews.freebsd.org/D27387
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Revision tags: release/12.2.0 |
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dadfbc2e |
| 23-Sep-2020 |
Brandon Bergren <bdragon@FreeBSD.org> |
[PowerPC64LE] LE opal_call() implementation
OPAL runs in big endian, so we need to rfid into it to switch endian atomically when branching to it, and we need to do the RETURN_TO_NATIVE_ENDIAN dance
[PowerPC64LE] LE opal_call() implementation
OPAL runs in big endian, so we need to rfid into it to switch endian atomically when branching to it, and we need to do the RETURN_TO_NATIVE_ENDIAN dance when it returns to us.
Sponsored by: Tag1 Consulting, Inc.
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4efb1ca7 |
| 23-Sep-2020 |
Brandon Bergren <bdragon@FreeBSD.org> |
[PowerPC64LE] Work around qemu TCG bug in mtmsrd emulation.
The TCG implementation of mtmsrd in qemu blindly copies the entire register to the MSR, instead of the specific bit positions listed in th
[PowerPC64LE] Work around qemu TCG bug in mtmsrd emulation.
The TCG implementation of mtmsrd in qemu blindly copies the entire register to the MSR, instead of the specific bit positions listed in the ISA.
This means that qemu will prematurely switch endian out from under the running code instead of waiting for the rfid, causing an immediate trap as it attempts to interpret the next instruction in the wrong endianness.
To work around this, ensure PSL_LE is still set before doing the mtmsrd.
In the future, we may wish to just turn off translation and unconditionally use rfid to switch to the ofmsr instead of quasi-switching to the ofmsr.
Add a new platform option so this can be disabled. (And so that we can conditonalize additional QEMU-specific hacks in the platform code.)
Sponsored by: Tag1 Consulting, Inc.
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Revision tags: release/11.4.0, release/12.1.0, release/11.3.0 |
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415e34c4 |
| 29-Mar-2019 |
Alan Somers <asomers@FreeBSD.org> |
MFHead@r345677
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0499e9c6 |
| 29-Mar-2019 |
Justin Hibbits <jhibbits@FreeBSD.org> |
powerpc64: Use medium code model in asm files for TOC references
Summary: With a sufficiently large TOC, it's possible to index out of range, as the immediate load instructions only permit 16-bit in
powerpc64: Use medium code model in asm files for TOC references
Summary: With a sufficiently large TOC, it's possible to index out of range, as the immediate load instructions only permit 16-bit indices, allowing up to 64kB range (signed) from the base pointer. Allow +/- 2GB range, with the medium code model TOC accesses in asm.
Patch originally by Brandon Bergren. The issue appears to impact ELFv2 more than ELFv1.
Reviewed by: luporl Differential Revision: https://reviews.freebsd.org/D19708
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Revision tags: release/12.0.0, release/11.2.0 |
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c79126f2 |
| 12-Jan-2018 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r327624 through r327885.
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fb3855e0 |
| 11-Jan-2018 |
Wojciech Macek <wma@FreeBSD.org> |
PowerNV: initial support for OPAL
OPAL is a dedicated firmware acting as a hypervisor. Add generic functions to provide all access.
Created by: Nathan Whitehorn <nw@freebsd.org> Submitte
PowerNV: initial support for OPAL
OPAL is a dedicated firmware acting as a hypervisor. Add generic functions to provide all access.
Created by: Nathan Whitehorn <nw@freebsd.org> Submitted by: Wojciech Macek <wma@freebsd.org>
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