hwpmc: add MPERF/APERF MSR support for AMD/Intel CPUs

Add support for reading the MPERF (MSR 0xE7) and APERF (MSR 0xE8)
model-specific registers on AMD/Intel CPUs through hwpmc(4). These
counters tr

hwpmc: add MPERF/APERF MSR support for AMD/Intel CPUs

Add support for reading the MPERF (MSR 0xE7) and APERF (MSR 0xE8)
model-specific registers on AMD/Intel CPUs through hwpmc(4). These
counters track maximum and actual performance frequency respectively,
and are used to compute effective CPU frequency scaling independent
of the nominal TSC rate. The name of the class was chosen as PERF
because later support for other PERF MSRs can be added to the same
class.

Extend libpmc(3) to expose the AMD/Intel MPERF/APERF counters added
to hwpmc(4) in the companion kernel change, so userland consumers
(pmcstat(8), etc.) can allocate and read these events by name.

Document the new PERF class and its MPERF/APERF counters in a new
pmc.perf.3 manual page, describing their semantics and how to read
them via pmc(3) and pmcstat(8).

Bump PMC_VERSION_MINOR.

Signed-off-by: Anderson Nascimento <anascime@amd.com>
Reviewed by: Ali Mashtizadeh <ali@mashtizadeh.com>, mhorne
Reviewed by: ziaee (manpages)
Sponsored by: AMD
Differential Revision: https://reviews.freebsd.org/D58647

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hwpmc: build hwpmc_rapl.c into the i386 module

The module's i386 source list compiles the files that call
pmc_rapl_initialize() and pmc_rapl_finalize() but not the one that defines
them, so the i386

hwpmc: build hwpmc_rapl.c into the i386 module

The module's i386 source list compiles the files that call
pmc_rapl_initialize() and pmc_rapl_finalize() but not the one that defines
them, so the i386 hwpmc.ko has both undefined and cannot be loaded.

Fixes: a99d04f39dab ("hwpmc: add RAPL energy-counter class (AMD + Intel)")
Assisted-by: Claude Code (Opus 5)

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hwpmc: add RAPL energy-counter class (AMD + Intel)

Add hwpmc_rapl.c/.h implementing PMC_CLASS_RAPL, a read-only
system-scope class modeled on TSC and wired into x86 AMD and Intel MD
init. A per-vend

hwpmc: add RAPL energy-counter class (AMD + Intel)

Add hwpmc_rapl.c/.h implementing PMC_CLASS_RAPL, a read-only
system-scope class modeled on TSC and wired into x86 AMD and Intel MD
init. A per-vendor MSR table covers AMD/Hygon and Intel; energy is
reported in microjoules, with the Intel server 2^-16 J DRAM unit
handled and 32-bit wraps recovered into a 64-bit accumulator.

The overflow guard follows the PMC lifetime: armed on the first
allocated PMC, callout_drain()d on the last release, and each tick only
rendezvouses CPUs holding one. Per-CPU spin locks guard the accumulator
against torn reads on i386. PMC_CAP_DOMWIDE lets pmcstat(8) allocate
one counter per NUMA domain instead of per CPU.

Reviewed by: mhorne, Ali Mashtizadeh <ali@mashtizadeh.com>
Sponsored by: AMD
Differential Revision: https://reviews.freebsd.org/D58028

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sys/modules/hwpmc/Makefile: tidy up

This module has several source files, with many conditional on the
platform architecture. Make it easier to read, and better for future
diffs against these lists.

sys/modules/hwpmc/Makefile: tidy up

This module has several source files, with many conditional on the
platform architecture. Make it easier to read, and better for future
diffs against these lists.

- Convert to one SRC per line
- Simplify arm/armv7 condition
- Remove now-empty header comment
- Minor formatting

MFC after: 1 week
Sponsored by: The FreeBSD Foundation

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hwpmc: Initial support for AMD IBS

This patch adds support for AMD IBS. It adds a new class of performance
counter that cotains two events: ibs-fetch and ibs-op events. Unlike
most existing sampled

hwpmc: Initial support for AMD IBS

This patch adds support for AMD IBS. It adds a new class of performance
counter that cotains two events: ibs-fetch and ibs-op events. Unlike
most existing sampled events, IBS events provide a number of values
containing extra information regarding the sample. To support this we
use the existing callchain event, and introduce a new flag for multipart
payloads. The first 8 bytes of the pc_sample contains a header that
defines up to four payloads.

Sponsored by: Netflix

Reviewed by: imp,mhorne
Pull Request: https://github.com/freebsd/freebsd-src/pull/2022

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sys: Remove $FreeBSD$: one-line sh pattern

Remove /^\s*#[#!]?\s*\$FreeBSD\$.*$\n/

sys/modules: fix bogus OPT_ACPI tests

ACPI is not handled specially by sys/conf/kern.opts.mk (unlike a few
options), so we should fall back on the generic behavior of
sys/conf/config.mk, which pulls

sys/modules: fix bogus OPT_ACPI tests

ACPI is not handled specially by sys/conf/kern.opts.mk (unlike a few
options), so we should fall back on the generic behavior of
sys/conf/config.mk, which pulls from all the generated opt*.h files,
including opt_acpi.h, which will cause DEV_ACPI to be included in
KERN_OPTS. Then the generic machinery in sys/conf/kmod.mk will cause
SRCS.DEV_ACPI to be included in SRCS when appropriate.

Reviewed by: jhb, imp
Sponsored by: Microsoft
Differential Revision: https://reviews.freebsd.org/D38737

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hwpmc: Don't wrap entire files in #ifdef DEV_ACPI.

A subsequent commit will instead use existing infrastructure to
exclude the files from hwpmc.ko for non-ACPI builds. Note that the
original commit

hwpmc: Don't wrap entire files in #ifdef DEV_ACPI.

A subsequent commit will instead use existing infrastructure to
exclude the files from hwpmc.ko for non-ACPI builds. Note that the
original commit left the files as optional in sys/conf/files.arm64.

This reverts commit 751d88119fdc1dff71d1390c7768942a9b857bc6.

Sponsored by: DARPA
Differential Revision: https://reviews.freebsd.org/D38736

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Fix loading the hwpmc module when ACPI is enabled

In 0a9a4d2cd6092 a check for OPT_ACPI was added to the hwpmc Makefile
to fix loading the module in a kernel where ACPI has been disabled.
This broke

Fix loading the hwpmc module when ACPI is enabled

In 0a9a4d2cd6092 a check for OPT_ACPI was added to the hwpmc Makefile
to fix loading the module in a kernel where ACPI has been disabled.
This broke loading the module when ACPI was enabled in the build as
OPT_ACPI isn't a Makefile macro so was always disabled.

Move this check to the C files where the DEV_ACPI macro does exist.

Reviewed by: gnn
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D37773

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arm64: Fix hwpmc module for OPT_ACPI isn't selected

Fixes: 59191f3573f6 ("Add support of ARM CMN-600 controller ...")
Sponsored by: Beckhoff Automation GmbH & Co. KG

Add support of ARM CMN-600 controller, PMU access functions only. Add support of PMU counters of ARM CMN-600 controller.

Add support of ARM CMN-600 controller, PMU access functions only.
Add support

Add support of ARM CMN-600 controller, PMU access functions only. Add support of PMU counters of ARM CMN-600 controller.

Add support of ARM CMN-600 controller, PMU access functions only.
Add support of PMU counters of ARM CMN-600 controller.

Reviewed by: mhorne
Sponsored By: ARM
Differential Revision: https://reviews.freebsd.org/D32321

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The Arm CoreLink DMC-620 Dynamic Memory Controller PMU driver

Add the Arm CoreLink DMC-620 Dynamic Memory Controller PMU driver
Add DMC-620 support to hwpmc(4)

Reviewed by: mhorne
Sponsored By: Amp

The Arm CoreLink DMC-620 Dynamic Memory Controller PMU driver

Add the Arm CoreLink DMC-620 Dynamic Memory Controller PMU driver
Add DMC-620 support to hwpmc(4)

Reviewed by: mhorne
Sponsored By: Ampere Computing
Differential Revision: https://reviews.freebsd.org/D32670

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[PowerPC] hwpmc: add support for POWER8/9 PMCs

This change adds support for POWER8 and POWER9 PMCs (bare metal and
pseries).
All PowerISA 2.07B non-random events are supported.

Implementation was b

[PowerPC] hwpmc: add support for POWER8/9 PMCs

This change adds support for POWER8 and POWER9 PMCs (bare metal and
pseries).
All PowerISA 2.07B non-random events are supported.

Implementation was based on that of PPC970.

Reviewed by: jhibbits
Sponsored by: Eldorado Research Institute (eldorado.org.br)
Differential Revision: https://reviews.freebsd.org/D26110

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Remove sparc64 kernel support

Remove all sparc64 specific files
Remove all sparc64 ifdefs
Removee indireeect sparc64 ifdefs

Don't attempt to include hwpmc support for armv6, we're missing some of the
necessary support functions in cpu-v6.h, and it may be that the only armv6
platform we support (RPi, the bcm2835 SOC) is in

Don't attempt to include hwpmc support for armv6, we're missing some of the
necessary support functions in cpu-v6.h, and it may be that the only armv6
platform we support (RPi, the bcm2835 SOC) is incapable of supporting hwpmc.

Reported by: dim@

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For armv6 and armv7, build hwpmc_armv7.c as well as the base hwpmc_arm.c.

Submitted by: Arnaud YSMAL <arnaud.ysmal@stormshield.eu>

With r344062 in place, hwpmc_mod.c generally needs bus_if.h and
device_if.h.

hwpmc: remove unused pre-table driven bits for intel

Intel now provides comprehensive tables for all performance counters
and the various valid configuration permutations as text .json files.
Libpmc

hwpmc: remove unused pre-table driven bits for intel

Intel now provides comprehensive tables for all performance counters
and the various valid configuration permutations as text .json files.
Libpmc has been converted to use these and hwpmc_core has been greatly
simplified by moving to passthrough of the table values.

The one gotcha is that said tables don't support pentium pro and and pentium
IV. There's very few users of hwpmc on _amd64_ kernels on new hardware. It is
unlikely that anyone is doing low level optimization on 15 year old Intel
hardware. Nonetheless, if someone feels strongly enough to populate the
corresponding tables for p4 and ppro I will reinstate the files in to the
build.

Code for the K8 counters and !x86 architectures remains unchanged.

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sys/modules: normalize .CURDIR-relative paths to SRCTOP

This simplifies make output/logic

Tested with: `cd sys/modules; make ALL_MODULES=` on amd64
MFC after: 1 month
Sponsored by: Dell EMC Isilon

Add aarch64 files to the hwpmc(4) module build

This was probably missed because FreeBSD/arm64 did not yet support
modules when aarch64 support was added to hwpmc(4).

Submitted by: andrew

Implement hwpmc(4) for Freescale e500 core.

This supports e500v1, e500v2, and e500mc. Tested only on e500v2, but the
performance counters are identical across all, with e500mc having some
additional

Implement hwpmc(4) for Freescale e500 core.

This supports e500v1, e500v2, and e500mc. Tested only on e500v2, but the
performance counters are identical across all, with e500mc having some
additional events.

Relnotes: Yes

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Remove ia64.

This includes:
o All directories named *ia64*
o All files named *ia64*
o All ia64-specific code guarded by __ia64__
o All ia64-specific makefile logic
o Mention of ia64 in com

Remove ia64.

This includes:
o All directories named *ia64*
o All files named *ia64*
o All ia64-specific code guarded by __ia64__
o All ia64-specific makefile logic
o Mention of ia64 in comments and documentation

This excludes:
o Everything under contrib/
o Everything under crypto/
o sys/xen/interface
o sys/sys/elf_common.h

Discussed at: BSDcan

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Add missing file to Makefile.

MFC after: 1 month
X-MFC-with: 261342

Refactor PowerPC hwpmc(4) driver into generic and specific. More refactoring
will likely be done as more drivers are added, since AIM-compatible processors
have similar PMC configuration logic.

Add software PMC support.

New kernel events can be added at various location for sampling or counting.
This will for example allow easy system profiling whatever the processor is
with known tools li

Add software PMC support.

New kernel events can be added at various location for sampling or counting.
This will for example allow easy system profiling whatever the processor is
with known tools like pmcstat(8).

Simultaneous usage of software PMC and hardware PMC is possible, for example
looking at the lock acquire failure, page fault while sampling on
instructions.

Sponsored by: NETASQ
MFC after: 1 month

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