aq(4): add Atlantic 2 (AQC113) device supportAdd support for the Marvell Atlantic 2 (AQC113/114/115/116) controllers,a new chip generation that is not register-compatible with the Atlantic 1parts
aq(4): add Atlantic 2 (AQC113) device supportAdd support for the Marvell Atlantic 2 (AQC113/114/115/116) controllers,a new chip generation that is not register-compatible with the Atlantic 1parts aq(4) supports today. Adapted from the OpenBSD/NetBSD if_aq driver.Register and device definitions (aq2_hw.h): the firmware handshake(MIF_BOOT / MCP_HOST_REQ_INT / MIF_HOST_FINISHED), the 0x12000/0x13000firmware interface windows, and the action-resolver table (ART) thatreplaces Atlantic 1's discrete RX filters, plus the Atlantic 2 PCI deviceids and the aq_is_atlantic2() helper. Reserve a chip-feature bit(AQ_HW_CHIP_ATLANTIC2) and add the aq_hw fields the firmware fills at boot(ART base index, statistics interface version A0/B0). The per-VLAN-filterresolver-tag field comes from the Linux driver; the BSD sources neverwrite it.Firmware operations (aq_fwa2.c): Atlantic 2 talks to the management CPUthrough the 0x12000/0x13000 register windows plus the boot handshake,rather than Atlantic 1's mailbox in shared RAM. Implement that as a thirdaq_firmware_ops vtable (reset, set_mode, get_mode, get_mac_addr,get_stats); aq_fwa2_reboot() boots the firmware, selects the A2 ops, andreads the version and ART base index, failing fast on thecrash-init / boot-failed bits. fwa2_set_mode advertises full duplex only(the media model exposes no half-duplex types) and writes and acks thelink options before raising ACTIVE mode, so a forced media change does notbegin negotiation with a stale rate mask. enum aq_fw_link_speed gainsaq_fw_10M, which Atlantic 2 supports and Atlantic 1 does not.Probe and attach: list the device ids with their media types and linkspeeds (all copper; AQC113* up to 10G, AQC116C to 1G), populatehw->device_id, and tag the generation with AQ_HW_CHIP_ATLANTIC2 soIS_CHIP_FEATURE() recognises it uniformly. Branch firmware bring-up andreset on the generation: aq_hw_init_ucp() and aq_hw_reset() reboot the MCPinstead of the Atlantic 1 RBL/FLB reset -- without a real datapath resetevery stop/init cycle reprograms the rings on a live, desynced RX DMAengine and the receive path stays dead. aq_hw_init() programs theAtlantic 2 launch-time clock ratio in place of the Atlantic 1MRRS / TX-DMA request-limit clamp. Add an AQ_LINK_10M capability bit(Atlantic 2 links at 10M, Atlantic 1 cannot), offer 10baseT media, and mapIFM_10_T to aq_fw_10M.With every supported media type now present, replace the per-speed switchstatements in aq_media.c with a single {link bit, fw rate, IFM_* subtype,Mbit/s} table -- one source of truth for the supported link speeds.With this an Atlantic 2 card probes, brings up its firmware, reads itsMAC, and negotiates link; the RX action-resolver datapath comes next.Reviewed by: adrianDifferential Revision: https://reviews.freebsd.org/D58141
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aq(4): Add build infrastructureReviewed by: adrianSponsored by: The FreeBSD FoundationDifferential Revision: https://reviews.freebsd.org/D53839