newbus: globally replace device_add_child(..., -1) with DEVICE_UNIT_ANY

Sponsored by: Netflix

ig4_iic: Warn on NACK

Some DSDTs define non-existent devices, warn the user when an access is attempted on one of these devices.

Reviewed by: imp, markj, Elliott Mitchell
Pull Request: https://gith

ig4_iic: Warn on NACK

Some DSDTs define non-existent devices, warn the user when an access is attempted on one of these devices.

Reviewed by: imp, markj, Elliott Mitchell
Pull Request: https://github.com/freebsd/freebsd-src/pull/1125

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ig4: Actively use FIFO thresholds

Before every wait for FIFO interrupt set how much data/space do we
want to see there. Previous code was not using it for receive, as
result aggregating interrupts

ig4: Actively use FIFO thresholds

Before every wait for FIFO interrupt set how much data/space do we
want to see there. Previous code was not using it for receive, as
result aggregating interrupts only within processing latency. The
new code needs only one interrupt per transfer per FIFO length.

On my Dell XPS 13 9310 with iichid(4) touchscreen and touchpad this
reduces the interrupt rate per device down to 2 per sample or 16-20
per second when idle and 120-160 per second when actively touched.

MFC after: 1 month

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ig4: Fix FIFO depths detection

At least on my Tiger Lake-LP queue depth detection failed before the
ig4iic_set_config() call, resulting in no FIFO use. Moving it after
solves the problem, getting p

ig4: Fix FIFO depths detection

At least on my Tiger Lake-LP queue depth detection failed before the
ig4iic_set_config() call, resulting in no FIFO use. Moving it after
solves the problem, getting proper 64 bytes size.

On my Dell XPS 13 9310 with iichid(4) touchscreen and touchpad this
by few times reduces context switch rate in the driver, and probably
also improves the I2C bus utilization.

MFC after: 1 month

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ig4(4): Add an EMAG device type

Sponsored by: Ampere Computing LLC, Netflix
Submitted by: allanjude
Differential Revision: https://reviews.freebsd.org/D28746
Reviewed by: imp

sys: Remove $FreeBSD$: one-line .c pattern

Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/

ichiic: use bool for one-bit wide bit-fields

A one-bit wide bit-field can take only the values 0 and -1. Clang 16
introduced a warning that "implicit truncation from 'int' to a one-bit
wide bit-fiel

ichiic: use bool for one-bit wide bit-fields

A one-bit wide bit-field can take only the values 0 and -1. Clang 16
introduced a warning that "implicit truncation from 'int' to a one-bit
wide bit-field changes value from 1 to -1". Fix by using c99 bool.

Reported by: Clang
Reviewed by: emaste, wulf
MFC after: 3 days
Differential Revision: https://reviews.freebsd.org/D39665

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ichiic: Remove unused devclass arguments to DRIVER_MODULE.

Remove unused iicbus_devclass.

ig4: Add PCI IDs for Intel Gemini Lake I2C controller.

Submitted by: Dmitry Luhtionov
MFC after: 2 weeks

ig4(4): Increase timeout to about 1 second

Per the i2c spec, a slave device can stretch SCL idefinitely, so 25ms is
a bit arbitrary in general. smbus does specify an optional timeout
recovery mechan

ig4(4): Increase timeout to about 1 second

Per the i2c spec, a slave device can stretch SCL idefinitely, so 25ms is
a bit arbitrary in general. smbus does specify an optional timeout
recovery mechanism to be done at about 25~35ms, but the IPMI SSIF spec
says that BMCs don't have any obligation to implement that.
The BMC on Altra seems to mostly respond within 25ms, but occasionally
will stretch SCL for ~300 msec.

Also, the count_us mechanism seems to actually timeout around 25%
earlier than it would claim (timeout really happening around 19ms
instead of 25ms).

Sponsored by: Ampere Computing LLC
Submitted by: Klara Inc.
Reviewed by: manu, imp
Differential Revision: https://reviews.freebsd.org/D28747

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ig4(4): Add PCI IDs for Intel Tiger Lake

Submitted by: Neel Chauhan <neel AT neelc DOT org>
Differential Revision: https://reviews.freebsd.org/D27483

Merge ^/head r358731 through r358831.

iicbus(4): Add support for ACPI-based children enumeration

When iicbus is attached as child of Designware I2C controller it scans all
ACPI nodes for "I2C Serial Bus Connection Resource Descriptor" d

iicbus(4): Add support for ACPI-based children enumeration

When iicbus is attached as child of Designware I2C controller it scans all
ACPI nodes for "I2C Serial Bus Connection Resource Descriptor" described
in section 19.6.57 of ACPI specs.
If such a descriptor is found, I2C child is added to iicbus, it's I2C
address, IRQ resource and ACPI handle are added to ivars. Existing
ACPI bus-hosted child is deleted afterwards.

The driver also installs so called "I2C address space handler" which is
disabled by default as nontested.
Set hw.iicbus.enable_acpi_space_handler loader tunable to 1 to enable it.

Reviewed by: markj
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D22901

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[ig4] Try to workaround MIPS namespace pollution issue

[ig4] Convert ithread interrupt handler to filter based one.

[ig4] Add support for CannonLake controllers

They are clocked at 216MHz rate, much higher than previous models.

PR: 240485
Submitted by: Neel Chauhan <neel@neelc.org>

[ig4] Minor improvement of write pipelining

With leaving some data queued in the TX FIFO at the end of write cycle.

[ig4] wait for bus stop condition after stop command issued

It gives better error detection and ig4 driver's lock coverage
in a pipelined write case

[ig4] On SkyLake controllers issue reset on attach unconditionally.

It is very helpful during debugging of I2C issues.
It is done only for SkyLakes due to lack of testing on other hardware.

[ig4] Set STOP condition and flush TX/RX FIFOs on error

if controller has not it done for us yet.

Reset controller when transfer abort is failed.

[ig4] Improve error detection

Handle error bits of INTR_STAT and TX_ABORT registers.

Move interrupt clearing from interrupt handler to polling loop to get
common execution path with polled mode.

D

[ig4] Improve error detection

Handle error bits of INTR_STAT and TX_ABORT registers.

Move interrupt clearing from interrupt handler to polling loop to get
common execution path with polled mode.

Do not clear interrupts with reading of IG4_REG_CLR_INTR register as
interrupts, triggered during the period from reg_read(IG4_REG_INTR_STAT)
to reg_read(IG4_REG_CLR_INTR) will be missed.
Instead, read each IG4_REG_CLR_* register separately.

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[ig4] Convert polling loop from status-based to interrupt-based

INTR_STAT register exposes more useful informaton then STA register does
e.g. it exposes error and I2C bus STOP conditions. Make it a

[ig4] Convert polling loop from status-based to interrupt-based

INTR_STAT register exposes more useful informaton then STA register does
e.g. it exposes error and I2C bus STOP conditions. Make it a main source
of I2C transfer state.

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[ig4] Use interrupts for waiting for empty TX FIFO

[ig4] Convert last remaining usage of TX_NOTFULL status to TX_EMPTY

in ig4iic_read routine. It makes possible interrupt utilization while
waiting for empty space in TX FIFO.