Add Performance Monitoring Counters support for AArch64.
Family-common and CPU-specific counters implemented.

Supported CPUs: ARM Cortex A53/57/72.

Reviewed by: andrew, bz, emaste, gnn, jhb
Sponsor

Add Performance Monitoring Counters support for AArch64.
Family-common and CPU-specific counters implemented.

Supported CPUs: ARM Cortex A53/57/72.

Reviewed by: andrew, bz, emaste, gnn, jhb
Sponsored by: ARM Limited
Differential Revision: https://reviews.freebsd.org/D2555

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Merge from head

MFH: r280643-r281852

Sponsored by: The FreeBSD Foundation

MFH: r281668 through r281783

Sponsored by: The FreeBSD Foundation

Implement hwpmc(4) for Freescale e500 core.

This supports e500v1, e500v2, and e500mc. Tested only on e500v2, but the
performance counters are identical across all, with e500mc having some
additional

Implement hwpmc(4) for Freescale e500 core.

This supports e500v1, e500v2, and e500mc. Tested only on e500v2, but the
performance counters are identical across all, with e500mc having some
additional events.

Relnotes: Yes

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hwpmc: add initial Intel Broadwell support.

The full list of aliases and events will follow in a subsequent
commit.

MFC after: 1 month

Add support for the MIPS74K SoC family performance counters events.

These are similar to the mips24k performance counters - some are
available on perfcnt0/3, some are available on perfcnt1/4.
Howeve

Add support for the MIPS74K SoC family performance counters events.

These are similar to the mips24k performance counters - some are
available on perfcnt0/3, some are available on perfcnt1/4.
However, the events aren't all the same.

* Add the events, named the same as from Linux oprofile.
* Verify they're the same as "MIPS32(R) 74KTM Processor Core Family
Software User's Manual"; Document Number: MD00519; Revision 01.05.
* Rename INSTRUCTIONS to something else, so it doesn't clash with
the alias INSTRUCTIONS. I'll try to tidy this up later; there
are a few other aliases to add and shuffle around.

Tested:

* QCA9558 SoC (AP135 board) - MIPS74Kc core (no FPU.)
* make universe; where it didn't fail for other reasons.

TODO:

* It'd be nice to support the four performance counters
in at least this hardware, rather than just two.

Reviewed by: bsdimp ("looks good; don't break world".)

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MFH: r278968-r280640

Sponsored by: The FreeBSD Foundation

Merge r278538 through r280226.

Merge from head

Merge ^/head r279759 through r279892.

Fix Ivy Bridge+ MEM_UOPS_RETIRED counters

The MEM_UOPS_RETIRED actually work the same way as the Sandy
Bridge counters, but the counters were documented in a different
way and that seemed to cause t

Fix Ivy Bridge+ MEM_UOPS_RETIRED counters

The MEM_UOPS_RETIRED actually work the same way as the Sandy
Bridge counters, but the counters were documented in a different
way and that seemed to cause the Ivy Bridge counters to be
implemented incorrectly. Use the same counter definitions as
Sandy Bridge. While I'm here, rename the counters to match
what's documented in the datasheet.

Differential Revision: https://reviews.freebsd.org/D1590
MFC after: 1 month
Sponsored by: Sandvine Inc.

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Support architectural events on Haswell/Ivy Bridge

Differential Revision: https://reviews.freebsd.org/D1589
MFC after: 1 month
Sponsored by: Sandvine Inc

Fix Sandy Bridge+ hwpmc branch counters

On Sandy Bridge and later, to count branch-related events you
have to or together a mask indicating the type of branch
instruction to count (e.g. direct jump,

Fix Sandy Bridge+ hwpmc branch counters

On Sandy Bridge and later, to count branch-related events you
have to or together a mask indicating the type of branch
instruction to count (e.g. direct jump, branch, etc) and a bits
indicating whether to count taken and not-taken branches. The
current counter definitions where defining this bits individually,
so the counters never worked and always just counted 0.

Fix the counter definitions to instead contain the proper
combination of masks. Also update the man pages to reflect the
new counters.

Differential Revision: https://reviews.freebsd.org/D1587
MFC after: 1 month
Sponsored by: Sandvine Inc.

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Fix various bugs in Haswell counter definitions

1) The "WALK_COMPLETED_2M_4M" event incorrectly referenced 4K pages.
2) The umask for RING0 and RING123 events was reversed.

Differential Revision: h

Fix various bugs in Haswell counter definitions

1) The "WALK_COMPLETED_2M_4M" event incorrectly referenced 4K pages.
2) The umask for RING0 and RING123 events was reversed.

Differential Revision: https://reviews.freebsd.org/D1585
MFC after: 1 month
Sponsored by: Sandvine Inc

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Merge from HEAD

Merge ^/head r277804 through r277843.

Add ARMv7 performance monitoring counters.

Differential Revision: https://reviews.freebsd.org/D1687
Reviewed by: rpaulo
Sponsored by: DARPA, AFRL

Merge ^/head r277327 through r277718.

MFhead @ r277555

style(9) cleanup

MFhead @ r277403

Reintegrate head: r274132-r277384

Sponsored by: The FreeBSD Foundation

Update the hwpmc driver to have the new type HASWELL_XEON. Also
go back through HASWELL, IVY_BRIDGE, IVY_BRIDGE_XEON and SANDY_BRIDGE
to straighten out all the missing PMCs. We also add a new pmc too

Update the hwpmc driver to have the new type HASWELL_XEON. Also
go back through HASWELL, IVY_BRIDGE, IVY_BRIDGE_XEON and SANDY_BRIDGE
to straighten out all the missing PMCs. We also add a new pmc tool
pmcstudy, this allows one to run the various formulas from
the documents "Using Intel Vtune Amplifier XE on XXX Generation platforms" for
IB/SB and Haswell. The tool also allows one to postulate your own
formulas with any of the various PMC's. At some point I will enahance
this to work with Brendan Gregg's flame-graphs so we can flamegraph
various PMC interactions. Note the manual page also needs some
work (lots of work) but gnn has committed to help me with that ;-)
Reviewed by: gnn
MFC after:1 month
Sponsored by: Netflix Inc.

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IFC @r269962

Submitted by: Anish Gupta (akgupt3@gmail.com)