sys: Remove $FreeBSD$: two-line .h pattern

Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

arswitch(4): Remove support for AR{7240,9340} found in MIPS SoCs only

With the general removal of MIPS support there's no longer a need to
support these integrated switches.

Approved by: adrian
Dif

arswitch(4): Remove support for AR{7240,9340} found in MIPS SoCs only

With the general removal of MIPS support there's no longer a need to
support these integrated switches.

Approved by: adrian
Differential Revision: https://reviews.freebsd.org/D41394

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spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.

Discussed with: pfg
MFC After: 3 days
Sponsored by: Netflix

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Mechanically convert etherswitch drivers to IfAPI

Reviewed by: kd
Sponsored by: Juniper Networks, Inc.
Differential Revision: https://reviews.freebsd.org/D37813

[arswitch] Implement the switch MAC address fetch API.

The placeholders are here for some future "set" MAC address API.

Tested:

* AR9340 switch
* AR8327 switch

[arswitch] begin tidying up the learning and ATU management, introduce ATU APIs.

* Refactor the initial learning configuration (port learning, address expiry,
handling address moving between ports

[arswitch] begin tidying up the learning and ATU management, introduce ATU APIs.

* Refactor the initial learning configuration (port learning, address expiry,
handling address moving between ports, etc, etc) into a separate HAL routine
* and ensure that it's consistent between switch chips - the AR8216,8316,724x,9331
SoCs all share the same switch code.
* .. the AR8327 needs doing - the defaults seem OK for now
* .. the AR9340 is different but it's also programmed now.

* Add support for flushing a single port worth of ATU entries
* Add support for fetching the ATU table from AR8216 and derived chips

Tested:

* AR9344, Carambola 2

TODO:

* Further testing on other chips
* Add AR9340 support
* Add AR8327 support

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[arswitch] add a new debug section for upcoming address table management.

sys/dev: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error

sys/dev: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.

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Merge ^/head r303250 through r304235.

[arswitch] extend the debug support to be configurable at runtime.

* remove the DEBUG ifdef; defining it is too far reaching throughout
the whole system;
* add a bitmask in the softc for controlli

[arswitch] extend the debug support to be configurable at runtime.

* remove the DEBUG ifdef; defining it is too far reaching throughout
the whole system;
* add a bitmask in the softc for controlling debugging;
* .. enable said debugging as a sysctl;
* add bitmaps for register access, reset and vlans.

TODO:

* Now that the debug statements are configurable, we definitely could
do with more debugging
* Move the debugging into the top-level etherswitch driver and have
sub-drivers obey.

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[etherswitch] add in an initial API for controlling per-port LED behaviour.

This is just implemented for the AR8327 for now.

Submitted by: Dan Nelson <dnelson_1901@yahoo.com>

Merge sync of head

MFH: r278968-r280640

Sponsored by: The FreeBSD Foundation

Merge r278538 through r280226.

Merge from head

Merge ^/head r279893 through r279984.

Commit 802.1q configuration support for the AR8327.

This is slightly different to the other switches - the VLAN table
(VTU) programs in the vlan port mapping /and/ the port config
(tagged, untagged,

Commit 802.1q configuration support for the AR8327.

This is slightly different to the other switches - the VLAN table
(VTU) programs in the vlan port mapping /and/ the port config
(tagged, untagged, passthrough, any.)

So:

* Add VTU operations to program the VTU (vlan table)
* abstract out the mirror-disable function so it's .. well, a function.
* setup the port to have a dot1q configuration for dot1q - the
port security is VLAN (not per-port VLAN) and requires an entry
in the VLAN table;
* add set_dot1q / get_dot1q to program the VLAN table;
* since the tagged/untagged ports are now programmed into the VTU,
rather than global - plumb the ports /and/ untagged ports bitmaps
through the arswitch API.

Tested:

* AP135 - QCA9558 SoC + AR8327N switch

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Merge ^/head r279759 through r279892.

Methodise a couple more of the VLAN methods.

Add per-port vlan support for the AR8327.

All the per-port support is really doing is applying a port visibility
mask to each of the switchports. Everything still look like a single
portgroup (vlan

Add per-port vlan support for the AR8327.

All the per-port support is really doing is applying a port visibility
mask to each of the switchports. Everything still look like a single
portgroup (vlan id 1), but the per-port visibility mask is modified.

Whilst I'm here, also add some initial dot1q support - the pvid stuff
is doing the right thing, but it's not useful without the rest of
the VLAN table programming.

It's enough for me to be able to use the LAN/WAN port distinction
on the AP135, where there isn't (for now!) a dedicated PHY for the
"WAN" port.

Tested:

* AP135, QCA9558 SoC + AR8327 switch

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Fix up support for the AR8327.

* Even though I got the registers around "right", it seems
I'm not tickling the MDIO access correctly for the internal PHY
bus. Some of the switches are fine poki

Fix up support for the AR8327.

* Even though I got the registers around "right", it seems
I'm not tickling the MDIO access correctly for the internal PHY
bus. Some of the switches are fine poking at the external PHY
registers; others aren't. So, enable direct PHY bus access
for the AR8327, and leave the existing code in place for the
others.

* Go and shuffle the register access around. Whilst here,
restore the 2ms delay if changing page.

* Comment out some of the stub printf()s; there's some upcoming
work to add port VLAN support.

Tested:

* AP135 development board
* Carambola2 - AR9331 SoC

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MFC @ r266724

An SVM update will follow this.

Merge head

IFC @264767

Merge head up to r263906.