- Provide necessary includes, that before came via if.h pollution.
- Remove unnecessary ones.

Sponsored by: Netflix
Sponsored by: Nginx, Inc.

Merge head r233826 through r256722.

IFC @256277

Approved by: ken (mentor)

Merge from head

IFC @ r254014

IFC @ r253862

- change the SI_SUB_RUN_SCHEDULER sysinits in hv_utilc and
hv_netvsc_drv_freebsd.c to SI_SUB_KTHREAD_IDLE, since the
former is no longer in FreeBSD.
The use of these SYSINITs can pro

IFC @ r253862

- change the SI_SUB_RUN_SCHEDULER sysinits in hv_utilc and
hv_netvsc_drv_freebsd.c to SI_SUB_KTHREAD_IDLE, since the
former is no longer in FreeBSD.
The use of these SYSINITs can probably be removed.

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Fix the arswitch instability problem. It turns out that the
arswitch_writereg() routine was writing the registers in the wrong order.

Revert -r241918 as the root problem is now fixed. Remove anothe

Fix the arswitch instability problem. It turns out that the
arswitch_writereg() routine was writing the registers in the wrong order.

Revert -r241918 as the root problem is now fixed. Remove another workaround
from arswitch_ar7240.c.

Simplify and fix the code on arswitch_writephy() by using
arswitch_writereg().

While here remove a redundant declaration from arswitchvar.h.

Approved by: adrian (mentor)

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Merge fresh head.

MFC

IFC @ r242684

Sync from head

Locking for etherswitch framework:
* add lock/unlock methods;
* add lock/unlock default implementation;
* surround switch IOCTLs with locking;
* add lock/unlock implementation for arswitch;

Submitte

Locking for etherswitch framework:
* add lock/unlock methods;
* add lock/unlock default implementation;
* surround switch IOCTLs with locking;
* add lock/unlock implementation for arswitch;

Submitted by: Luiz Otavio O Souza
Approved by: adrian (mentor)

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IFC @ r238370

Merge head r233826 through r236168.

MFC

Commit the first pass of the etherswitch support.

This is designed to support the very basic ethernet switch chip behaviour,
specifically:

* accessing switch register space;
* accessing per-PHY reg

Commit the first pass of the etherswitch support.

This is designed to support the very basic ethernet switch chip behaviour,
specifically:

* accessing switch register space;
* accessing per-PHY registers (for switches that actually expose PHYs);
* basic vlan group support, which applies for the rtl8366 driver but not
for the atheros switches.

This also includes initial support for:

* rtl8366rb support - which is a 10/100/1000 switch which supports
vlan groups;
* Initial Atheros AR8316 switch support - which is a 10/100/1000 switch
which supports an alternate vlan configuration (so the vlan group
methods are stubbed.)

The general idea here is that the switch driver may speak to a variety of
backend busses (mdio, i2c, spi, whatever) and expose:

* If applicable, one or more MDIO busses which ethernet interfaces can
then attach PHYs to via miiproxy/mdioproxy;

* exposes miibusses, one for each port at the moment, so ..

* .. a PHY can be exposed on each miibus, for each switch port, with all
of the existing MII/ifnet framework.

However:

* The ifnet is manually created for now, and it isn't linked into the
interface list, nor can you (currently) send/receive frames on this ifnet.
At some point in the future there may be _some_ support for this, for
switches with a multi-port, isolated mode.

* I'm still in the process of sorting out correct(er) locking.

TODO:

* ray's switch code in zrouter (zrouter.org) includes a much more developed
newbus API that covers the various switch methods, as well as a
capability API so drivers, the switch layer and the userland utility
can properly control the subset of supported features.

The plan is to sort that out later, once the rest of ray's switch drivers
are brought over and extended to export MII busses and PHYs.

Submitted by: Stefan Bethke <stb@lassitu.de>
Reviewed by: ray

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