sys: Remove $FreeBSD$: one-line .c pattern

Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.

Discussed with: pfg
MFC After: 3 days
Sponsored by: Netflix

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bhnd: Remove unused devclass arguments to DRIVER_MODULE.

bhnd: plug set-but-not-used vars

Sponsored by: Rubicon Communications, LLC ("Netgate")

newbus: add bus_topo_assert

Add bus_topo_assert() and implmement it as GIANT_REQUIRED for the
moment. This will allow us to change more easily to a newbus-specific
lock int he future.

Sponsored by:

newbus: add bus_topo_assert

Add bus_topo_assert() and implmement it as GIANT_REQUIRED for the
moment. This will allow us to change more easily to a newbus-specific
lock int he future.

Sponsored by: Netflix
Reviewed by: wulf, mav, jhb
Differential Revision: https://reviews.freebsd.org/D31833

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newbus: Move from bus_child_{pnpinfo,location}_src to bus_child_{pnpinfo,location} with sbuf

Now that the upper layers all go through a layer to tie into these
information functions that translates

newbus: Move from bus_child_{pnpinfo,location}_src to bus_child_{pnpinfo,location} with sbuf

Now that the upper layers all go through a layer to tie into these
information functions that translates an sbuf into char * and len. The
current interface suffers issues of what to do in cases of truncation,
etc. Instead, migrate all these functions to using struct sbuf and these
issues go away. The caller is also in charge of any memory allocation
and/or expansion that's needed during this process.

Create a bus_generic_child_{pnpinfo,location} and make it default. It
just returns success. This is for those busses that have no information
for these items. Migrate the now-empty routines to using this as
appropriate.

Document these new interfaces with man pages, and oversight from before.

Reviewed by: jhb, bcr
Sponsored by: Netflix
Differential Revision: https://reviews.freebsd.org/D29937

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[bhnd] remove unused sc variable

Cosmetic patch to remove unused sc variable.

Tested on mips32

Reviewed by: bz, imp, landonf
Sponsored by: Postgres Professional
Differential revision: https://revi

[bhnd] remove unused sc variable

Cosmetic patch to remove unused sc variable.

Tested on mips32

Reviewed by: bz, imp, landonf
Sponsored by: Postgres Professional
Differential revision: https://reviews.freebsd.org/D18948

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bhnd: clean up empty lines in .c and .h files

bhnd(4): Include board_devid in the bhnd_board_info structure, and populate
the expected default board_vendor value on MIPS SoCs.

This is required by bwn(4) to differentiate between single-band and

bhnd(4): Include board_devid in the bhnd_board_info structure, and populate
the expected default board_vendor value on MIPS SoCs.

This is required by bwn(4) to differentiate between single-band and
dual-band device variants that otherwise share a common chip ID.

Approved by: adrian (mentor, implicit)
Sponsored by: The FreeBSD Foundation

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SPDX: license IDs for some ISC-related files.

bhnd(4): Print the core's hardware revision in bhnd(4)'s
BUS_PROBE_NOMATCH().

Approved by: adrian (mentor, implicit)
Sponsored by: The FreeBSD Foundation

Merge ^/head r325999 through r326131.

bhnd(4): extend the PMU APIs to support bwn(4)

The bwn(4) driver requires a number of extensions to the bhnd(4) PMU
interface to support external configuration of PLLs, LDOs, and other
parameters th

bhnd(4): extend the PMU APIs to support bwn(4)

The bwn(4) driver requires a number of extensions to the bhnd(4) PMU
interface to support external configuration of PLLs, LDOs, and other
parameters that require chipset or PHY-specific workarounds.

These changes add support for:

- Writing raw voltage register values to PHY-specific LDO regulator
registers (required by LP-PHY).
- Enabling/disabling PHY-specific LDOs (required by LP-PHY)
- Writing to arbitrary PMU chipctrl registers (required for common PHY PLL
reset support).
- Requesting chipset/PLL-specific spurious signal avoidance modes.
- Querying clock frequency and latency.

Additionally, rather than updating legacy PWRCTL support to conform to the
new PMU interface:

- PWRCTL API is now provided by a bhnd_pwrctl_if.m interface.
- Since PWRCTL is only found in older SSB-based chipsets, translation from
bhnd(4) bus APIs to corresponding PWRCTL operations is now handled
entirely within the siba(4) driver.
- The PWRCTL-specific host bridge clock gating APIs in bhnd_bus_if.m have
been lifted out into a standalone bhnd_pwrctl_hostb_if.m interface.

Approved by: adrian (mentor, implicit)
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D12664

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bhnd(4): implement MIPS and PCI(e) interrupt support

On BHND MIPS SoCs, this replaces the use of hard-coded MIPS IRQ#s in the
common bhnd(4) core drivers; we now register an INTRNG child PIC that
ha

bhnd(4): implement MIPS and PCI(e) interrupt support

On BHND MIPS SoCs, this replaces the use of hard-coded MIPS IRQ#s in the
common bhnd(4) core drivers; we now register an INTRNG child PIC that
handles routing of backplane interrupt vectors via the MIPS core.

On BHND PCI devices, backplane interrupt vectors are now routed to the
PCI/PCIe host bridge core when bus_setup_intr() is called, where they are
dispatched by the PCI core via a host interrupt (e.g. INTx/MSI).

The bhndb(4) bridge driver tracks registered interrupt handlers for the
bridged bhnd(4) devices and manages backplane interrupt routing, while
delegating actual bus interrupt setup/teardown to the parent bus on behalf
of the bridged cores.

Approved by: adrian (mentor, implicit)
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D12518

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Merge ^/head r323559 through r325504.

MFhead@r324075

bhnd: Implement bhnd(4) platform device registration.

Add bhnd(4) API for explicitly registering BHND platform devices (ChipCommon,
PMU, NVRAM, etc) with the bus, rather than walking the newbus hier

bhnd: Implement bhnd(4) platform device registration.

Add bhnd(4) API for explicitly registering BHND platform devices (ChipCommon,
PMU, NVRAM, etc) with the bus, rather than walking the newbus hierarchy to
discover platform devices. These devices are now also refcounted; attempting
to deregister an actively used platform device will return EBUSY.

This resolves a lock ordering incompatibility with bwn(4)'s firmware loading
threads; previously it was necessary to acquire Giant to protect newbus access
when locating and querying the NVRAM device.

Approved by: adrian (mentor)
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D12392

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Merge ^/head r305892 through r306302.

bhnd(4): Implement common API for IOST/IOCTL register access and core reset


- Added bhnd(4) bus APIs for per-core ioctl/iost register access.
- Updated reset/suspend bhnd(4) APIs for compatibility

bhnd(4): Implement common API for IOST/IOCTL register access and core reset


- Added bhnd(4) bus APIs for per-core ioctl/iost register access.
- Updated reset/suspend bhnd(4) APIs for compatibility with ioctl/iost
changes.
- Implemented core reset/suspend support for both bcma(4) and siba(4).
- Implemented explicit release of all outstanding PMU requests at the bus
level when putting a core into reset.

Approved by: adrian (mentor, implicit)
Differential Revision: https://reviews.freebsd.org/D8009

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Merge ^/head r305431 through r305622.

bhnd(4): Implement backplane interrupt handling.

This adds bhnd(4) bus-level support for querying backplane interrupt vector
routing, and delegating machine/bridge-specific interrupt handling to the

bhnd(4): Implement backplane interrupt handling.

This adds bhnd(4) bus-level support for querying backplane interrupt vector
routing, and delegating machine/bridge-specific interrupt handling to the
concrete bhnd(4) driver implementation.

On bhndb(4) bridged PCI devices, we provide the PCI/MSI interrupt directly
to attached cores.

On MIPS devices, we report a backplane interrupt count of 0, effectively
disabling the bus-level interrupt assignment. This allows mips/broadcom
to temporarily continue using hard-coded MIPS IRQs until bhnd_mips PIC
support is implemented.

Reviewed by: mizhka
Approved by: adrian (mentor, implicit)

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MFhead @ r305013

Merge ^/head r304700 through r304884.

bhnd(4): Initial PMU/PWRCTL power and clock management support.


- Added bhnd_pmu driver implementations for PMU and PWRCTL chipsets,
derived from Broadcom's ISC-licensed HND code.
- Added bhnd bu

bhnd(4): Initial PMU/PWRCTL power and clock management support.


- Added bhnd_pmu driver implementations for PMU and PWRCTL chipsets,
derived from Broadcom's ISC-licensed HND code.
- Added bhnd bus-level support for routing per-core clock and resource
power requests to the PMU device.
- Lift ChipCommon support out into the bhnd module, dropping
bhnd_chipc.

Reviewed by: mizhka
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D7492

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MFhead @ r304815