sys: Remove $FreeBSD$: one-line sh pattern

Remove /^\s*#[#!]?\s*\$FreeBSD\$.*$\n/

powerpc/pseries: Allow radix pmap in pseries for ISA 3.0

ISA 3.0 allows for nested radix translations with minimal to no
involvement of the hypervisor. This should make pseries signficantly
faster

powerpc/pseries: Allow radix pmap in pseries for ISA 3.0

ISA 3.0 allows for nested radix translations with minimal to no
involvement of the hypervisor. This should make pseries signficantly
faster on POWER9 pseries instances, as fewer hypercalls are needed to
manage pmap now.

MFC after: 2 weeks
Relnotes: yes

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Make ISA_206_ATOMICS a kernel option

Summary:
To make it easier to build a kernel with PowerISA 2.06 atomics (sub-word
atomics), add a kernel config option. User space still needs to specify
it as

Make ISA_206_ATOMICS a kernel option

Summary:
To make it easier to build a kernel with PowerISA 2.06 atomics (sub-word
atomics), add a kernel config option. User space still needs to specify
it as a CFLAG but that seems easier to do than for the kernel config.

Reviewed By: luporl
Differential Revision: https://reviews.freebsd.org/D29809

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Remove remaning definition of GFB_<foo> options.
They are not used in source files.
This fixes build of some arm boards after r368159.

Reported by: mjg

[PowerPC64LE] Work around qemu TCG bug in mtmsrd emulation.

The TCG implementation of mtmsrd in qemu blindly copies the entire register
to the MSR, instead of the specific bit positions listed in th

[PowerPC64LE] Work around qemu TCG bug in mtmsrd emulation.

The TCG implementation of mtmsrd in qemu blindly copies the entire register
to the MSR, instead of the specific bit positions listed in the ISA.

This means that qemu will prematurely switch endian out from under the
running code instead of waiting for the rfid, causing an immediate trap
as it attempts to interpret the next instruction in the wrong endianness.

To work around this, ensure PSL_LE is still set before doing the mtmsrd.

In the future, we may wish to just turn off translation and unconditionally
use rfid to switch to the ofmsr instead of quasi-switching to the ofmsr.

Add a new platform option so this can be disabled. (And so that we can
conditonalize additional QEMU-specific hacks in the platform code.)

Sponsored by: Tag1 Consulting, Inc.

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[PowerPC64LE] Set up powerpc.powerpc64le architecture

This is the initial set up for PowerPC64LE.

The current plan is for this arch to remain experimental for FreeBSD 13.

This started as a weekend

[PowerPC64LE] Set up powerpc.powerpc64le architecture

This is the initial set up for PowerPC64LE.

The current plan is for this arch to remain experimental for FreeBSD 13.

This started as a weekend learning project for me and kinda snowballed from
there.

(More to follow momentarily.)

Reviewed by: imp (earlier version), emaste
Sponsored by: Tag1 Consulting, Inc.
Differential Revision: https://reviews.freebsd.org/D26399

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powerpc: Axe PPC4xx support.

Summary:
The support was added almost a decade ago, and never completed. Just axe
it. It was also inadvertently broken 5 years ago, and nobody noticed.

Reviewed by: b

powerpc: Axe PPC4xx support.

Summary:
The support was added almost a decade ago, and never completed. Just axe
it. It was also inadvertently broken 5 years ago, and nobody noticed.

Reviewed by: bdragon
Differential Revision: https://reviews.freebsd.org/D23753

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Enable ixl device on PowerPC64

The ixl driver now works on PowerPC64 and may be compiled in-kernel and
as a module.

Reviewed by: alfredo, erj
Sponsored by: Eldorado Research Institute (eldorado.org

Enable ixl device on PowerPC64

The ixl driver now works on PowerPC64 and may be compiled in-kernel and
as a module.

Reviewed by: alfredo, erj
Sponsored by: Eldorado Research Institute (eldorado.org.br)
Differential Revision: https://reviews.freebsd.org/D23974

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powerpc: Add AmigaOne platform, a subclass of MPC85xx

Summary:
The AmigaOne platform, encompassing the X5000 and A1222 at this time, is
based on the mpc85xx platform, but includes some things not li

powerpc: Add AmigaOne platform, a subclass of MPC85xx

Summary:
The AmigaOne platform, encompassing the X5000 and A1222 at this time, is
based on the mpc85xx platform, but includes some things not listed in
the device tree. Some custom devices, like CPLD, could be added to the
device tree with an overlay, or other means. However, some cannot
easily be done, such as the power button interrupt.

The directory will also become a location to add AmigaOne platform drivers,
such as the aforementioned CPLD, and its children.

Reviewed by: bdragon
Differential Revision: https://reviews.freebsd.org/D21829

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MFHead @r350386

Sponsored by: The FreeBSD Foundation

powerpc/pmap64: Make moea64 statistics optional

Summary:
It turns out statistics accounting is very expensive in the pmap driver,
and doesn't seem necessary in the common case. Make this optional
b

powerpc/pmap64: Make moea64 statistics optional

Summary:
It turns out statistics accounting is very expensive in the pmap driver,
and doesn't seem necessary in the common case. Make this optional
behind a MOEA64_STATS #define, which one can set if they really need
statistics.

This saves ~7-8% on buildworld time on a POWER9.

Found by bdragon.

Reviewed by: luporl
Differential Revision: https://reviews.freebsd.org/D20903

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Move most of the contents of opt_compat.h to opt_global.h.

opt_compat.h is mentioned in nearly 180 files. In-progress network
driver compabibility improvements may add over 100 more so this is
close

Move most of the contents of opt_compat.h to opt_global.h.

opt_compat.h is mentioned in nearly 180 files. In-progress network
driver compabibility improvements may add over 100 more so this is
closer to "just about everywhere" than "only some files" per the
guidance in sys/conf/options.

Keep COMPAT_LINUX32 in opt_compat.h as it is confined to a subset of
sys/compat/linux/*.c. A fake _COMPAT_LINUX option ensure opt_compat.h
is created on all architectures.

Move COMPAT_LINUXKPI to opt_dontuse.h as it is only used to control the
set of compiled files.

Reviewed by: kib, cem, jhb, jtl
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D14941

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PowerNV: XICS support for PowerNV/OPAL

Make XICS to be OPAL-aware.

Created by: Nathan Whitehorn <nwhitehorn@freebsd.org>
Submitted by: Wojciech Macek <wma@semihalf.com>
Sponsore

PowerNV: XICS support for PowerNV/OPAL

Make XICS to be OPAL-aware.

Created by: Nathan Whitehorn <nwhitehorn@freebsd.org>
Submitted by: Wojciech Macek <wma@semihalf.com>
Sponsored by: FreeBSD Foundation

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Merge ^/head r327624 through r327885.

PowerNV: initial support for OPAL

OPAL is a dedicated firmware acting as a hypervisor.
Add generic functions to provide all access.

Created by: Nathan Whitehorn <nw@freebsd.org>
Submitte

PowerNV: initial support for OPAL

OPAL is a dedicated firmware acting as a hypervisor.
Add generic functions to provide all access.

Created by: Nathan Whitehorn <nw@freebsd.org>
Submitted by: Wojciech Macek <wma@freebsd.org>

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Merge ^/head r307736 through r308146.

Create a new MACHINE_ARCH for Freescale PowerPC e500v2

Summary:
The Freescale e500v2 PowerPC core does not use a standard FPU.
Instead, it uses a Signal Processing Engine (SPE)--a DSP-style vector p

Create a new MACHINE_ARCH for Freescale PowerPC e500v2

Summary:
The Freescale e500v2 PowerPC core does not use a standard FPU.
Instead, it uses a Signal Processing Engine (SPE)--a DSP-style vector processor
unit, which doubles as a FPU. The PowerPC SPE ABI is incompatible with the
stock powerpc ABI, so a new MACHINE_ARCH was created to deal with this.
Additionaly, the SPE opcodes overlap with Altivec, so these are mutually
exclusive. Taking advantage of this fact, a new file, powerpc/booke/spe.c, was
created with the same function set as in powerpc/powerpc/altivec.c, so it
becomes effectively a drop-in replacement. setjmp/longjmp were modified to save
the upper 32-bits of the now-64-bit GPRs (upper 32-bits are only accessible by
the SPE).

Note: This does _not_ support the SPE in the e500v1, as the e500v1 SPE does not
support double-precision floating point.

Also, without a new MACHINE_ARCH it would be impossible to provide binary
packages which utilize the SPE.

Additionally, no work has been done to support ports, work is needed for this.
This also means no newer gcc can yet be used. However, gcc's powerpc support
has been refactored which would make adding a powerpcspe-freebsd target very
easy.

Test Plan:
This was lightly tested on a RouterBoard RB800 and an AmigaOne A1222
(P1022-based) board, compiled against the new ABI. Base system utilities
(/bin/sh, /bin/ls, etc) still function appropriately, the system is able to boot
multiuser.

Reviewed By: bdrewery, imp
Relnotes: yes
Differential Revision: https://reviews.freebsd.org/D5683

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Merge ^/head r303250 through r304235.

Merge MPC85XX and QorIQ config options

Summary:
MPC85XX and QorIQ are very similar. When the DPAA dTSEC driver was
added, QORIQ_DPAA was brought in as a config option to support the differences
in

Merge MPC85XX and QorIQ config options

Summary:
MPC85XX and QorIQ are very similar. When the DPAA dTSEC driver was
added, QORIQ_DPAA was brought in as a config option to support the differences
in hardware register settings between QorIQ (e500mc-, e5500- based) SoCs and
QUICC (e500v1/e500v2-based) SoCs, particularly in the Local Access Window (LAW)
target settings.

Unify these settings using macros to hide details and ease porting, and use a
new function (mpc85xx_is_qoriq()) to distinguish between QorIQ and QUICC SoCs at
runtime.

An alternative to using the function could be to use a variable initialized at
platform attach time, which may incur less overhead at runtime. Since it's not
in the critical path once booted, this optimization doesn't seem necessary at
first pass.

Reviewed by: nwhitehorn
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D7294

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MFH r289384-r293170

Sponsored by: The FreeBSD Foundation

Catch up with head (r291075).

Add support for new LAW registers in QorIQ SoCs.

QorIQ SoCs (e5500 core, P5 family) have 2 BARs for local access windows, while
MPC85XX, and P1/P2 families use only a single BAR register.

This also

Add support for new LAW registers in QorIQ SoCs.

QorIQ SoCs (e5500 core, P5 family) have 2 BARs for local access windows, while
MPC85XX, and P1/P2 families use only a single BAR register.

This also adds the QORIQ_DPAA option, mutually exclusive to MPC85XX, to handle
this difference.

Obtained from: Semihalf
Sponsored by: Alex Perez/Inertial Computing

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Merge from head

Sponsored by: Gandi.net

Finish merging from head, messed up in previous attempt

Merge r286744-r287584 from head.