| #
ddf7fbbb |
| 09-Jan-2024 |
Ruslan Bukin <br@FreeBSD.org> |
Intel FPGA: Support programming larger bitfiles.
Issue data claim command after every chunk of data programmed,
so we can reuse the SVC buffer for the next chunk.
Tested on Terasic DE10 Pro.
Spons
Intel FPGA: Support programming larger bitfiles.
Issue data claim command after every chunk of data programmed,
so we can reuse the SVC buffer for the next chunk.
Tested on Terasic DE10 Pro.
Sponsored by: UKRI
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| #
fdafd315 |
| 24-Nov-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Automated cleanup of cdefs and other formatting
Apply the following automated changes to try to eliminate
no-longer-needed sys/cdefs.h includes as well as now-empty
blank lines in a row.
Remov
sys: Automated cleanup of cdefs and other formatting
Apply the following automated changes to try to eliminate
no-longer-needed sys/cdefs.h includes as well as now-empty
blank lines in a row.
Remove /^#if.*\n#endif.*\n#include\s+<sys/cdefs.h>.*\n/
Remove /\n+#include\s+<sys/cdefs.h>.*\n+#if.*\n#endif.*\n+/
Remove /\n+#if.*\n#endif.*\n+/
Remove /^#if.*\n#endif.*\n/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/types.h>/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/param.h>/
Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/capsicum.h>/
Sponsored by: Netflix
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Revision tags: release/14.0.0 |
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| #
685dc743 |
| 16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove $FreeBSD$: one-line .c pattern
Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/
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|
Revision tags: release/13.2.0, release/12.4.0, release/13.1.0 |
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| #
3d2549ce |
| 09-May-2022 |
John Baldwin <jhb@FreeBSD.org> |
arm64 intel: Remove unused devclass arguments to DRIVER_MODULE.
|
|
Revision tags: release/12.3.0, release/13.0.0, release/12.2.0, release/11.4.0, release/12.1.0 |
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| #
61c1328e |
| 13-Sep-2019 |
Dimitry Andric <dim@FreeBSD.org> |
Merge ^/head r352105 through r352307.
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| #
ee41e38d |
| 13-Sep-2019 |
Ruslan Bukin <br@FreeBSD.org> |
Add support for Intel Stratix 10 platform.
Intel Stratix 10 SoC includes a quad-core arm64 cluster and FPGA fabric.
This adds support for reconfiguring FPGA.
Accessing FPGA core of this SoC requir
Add support for Intel Stratix 10 platform.
Intel Stratix 10 SoC includes a quad-core arm64 cluster and FPGA fabric.
This adds support for reconfiguring FPGA.
Accessing FPGA core of this SoC require the level of privilege EL3,
while kernel runs in EL1 (lower) level of privilege.
This provides an Intel service layer interface that uses SMCCC to pass
queries to the secure-monitor (EL3).
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D21454
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