riscv: remove more riscv64sf support

Remove a few more bits of riscv64sf support in libc and libm.

Reduce floating point ABI checks to requiring double hard float.

Reviewed by: imp, jhb
Fixes: 1c

riscv: remove more riscv64sf support

Remove a few more bits of riscv64sf support in libc and libm.

Reduce floating point ABI checks to requiring double hard float.

Reviewed by: imp, jhb
Fixes: 1ca12bd927d7 Remove the riscv64sf architecture.
Differential Revision: https://reviews.freebsd.org/D44334

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msun/riscv: expose fe{disable,enable}except

This is required for GCC to build.

PR: 272759
Reported by: dgilbert@eicat.ca
Submitted by: jrtc27
Differential Revision: https://reviews.freebsd.org/D44

msun/riscv: expose fe{disable,enable}except

This is required for GCC to build.

PR: 272759
Reported by: dgilbert@eicat.ca
Submitted by: jrtc27
Differential Revision: https://reviews.freebsd.org/D44333

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Remove $FreeBSD$: two-line .h pattern

Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

RISC-V: Fix feenableexcept return value

The man page says "The feenableexcept(), fedisableexcept(), and
fegetexcept() functions return a bitmap of the exceptions that were
unmasked prior to the call

RISC-V: Fix feenableexcept return value

The man page says "The feenableexcept(), fedisableexcept(), and
fegetexcept() functions return a bitmap of the exceptions that were
unmasked prior to the call.", so we should return zero not -1.

Reviewed By: mhorne
MFC after: 3 days
Differential Revision: https://reviews.freebsd.org/D29386

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Silence unused parameter warnings in the RISC-V fenv.h

After increasing the lib/msun/tests WARNS to 6, this triggers a
compilation error for RISC-V.

Fixes: 87d65c747a43 ("lib/msun: Allow building

Silence unused parameter warnings in the RISC-V fenv.h

After increasing the lib/msun/tests WARNS to 6, this triggers a
compilation error for RISC-V.

Fixes: 87d65c747a43 ("lib/msun: Allow building tests with WARNS=6")
Reported by: Jenkins

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Replace SOFTFLOAT with __riscv_float_abi_*.

With SOFTFLOAT, libc and libm were built correctly, but any program
including fenv.h itself assumed it was on a hardfloat systen and emitted
inline fpu in

Replace SOFTFLOAT with __riscv_float_abi_*.

With SOFTFLOAT, libc and libm were built correctly, but any program
including fenv.h itself assumed it was on a hardfloat systen and emitted
inline fpu instructions for fedisableexcept() and friends.

Unlike r315424 which did this for MIPS, I've used riscv_float_abi_soft
and riscv_float_abi_double macros as appropriate rather than using
__riscv_float_abi_soft exclusively. This ensures that attempts to use an
unsupported hardfloat ABI will fail.

Reviewed by: br
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D10039

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Merge ^/head r308491 through r308841.

Add full softfloat and hardfloat support for RISC-V.

Hardfloat is now default (use riscv64sf as TARGET_ARCH
for softfloat).

Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.

Add full softfloat and hardfloat support for RISC-V.

Hardfloat is now default (use riscv64sf as TARGET_ARCH
for softfloat).

Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D8529

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MFH r289384-r293170

Sponsored by: The FreeBSD Foundation

MFH @r292599

This includes the pluggable TCP framework and other chnages to the
netstack to track for VNET stability.

Security: The FreeBSD Foundation

Start support for the RISC-V 64-bit architecture developed by UC Berkeley.

RISC-V is a new ISA designed to support computer research and education, and
is now become a standard open architecture for

Start support for the RISC-V 64-bit architecture developed by UC Berkeley.

RISC-V is a new ISA designed to support computer research and education, and
is now become a standard open architecture for industry implementations.

This is a minimal set of changes required to run 'make kernel-toolchain'
using external (GNU) toolchain.

The FreeBSD/RISC-V project home: https://wiki.freebsd.org/riscv.

Reviewed by: andrew, bdrewery, emaste, imp
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Differential Revision: https://reviews.freebsd.org/D4445

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