omap-dmic.c (75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37) omap-dmic.c (5371a79be97caacf842282fcb309675c975f428f)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * omap-dmic.c -- OMAP ASoC DMIC DAI driver
4 *
5 * Copyright (C) 2010 - 2011 Texas Instruments
6 *
7 * Author: David Lambert <dlambert@ti.com>
8 * Misael Lopez Cruz <misael.lopez@ti.com>

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107
108static void omap_dmic_dai_shutdown(struct snd_pcm_substream *substream,
109 struct snd_soc_dai *dai)
110{
111 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
112
113 mutex_lock(&dmic->mutex);
114
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * omap-dmic.c -- OMAP ASoC DMIC DAI driver
4 *
5 * Copyright (C) 2010 - 2011 Texas Instruments
6 *
7 * Author: David Lambert <dlambert@ti.com>
8 * Misael Lopez Cruz <misael.lopez@ti.com>

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107
108static void omap_dmic_dai_shutdown(struct snd_pcm_substream *substream,
109 struct snd_soc_dai *dai)
110{
111 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
112
113 mutex_lock(&dmic->mutex);
114
115 pm_qos_remove_request(&dmic->pm_qos_req);
115 cpu_latency_qos_remove_request(&dmic->pm_qos_req);
116
117 if (!dai->active)
118 dmic->active = 0;
119
120 mutex_unlock(&dmic->mutex);
121}
122
123static int omap_dmic_select_divider(struct omap_dmic *dmic, int sample_rate)

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225}
226
227static int omap_dmic_dai_prepare(struct snd_pcm_substream *substream,
228 struct snd_soc_dai *dai)
229{
230 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
231 u32 ctrl;
232
116
117 if (!dai->active)
118 dmic->active = 0;
119
120 mutex_unlock(&dmic->mutex);
121}
122
123static int omap_dmic_select_divider(struct omap_dmic *dmic, int sample_rate)

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225}
226
227static int omap_dmic_dai_prepare(struct snd_pcm_substream *substream,
228 struct snd_soc_dai *dai)
229{
230 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
231 u32 ctrl;
232
233 if (pm_qos_request_active(&dmic->pm_qos_req))
234 pm_qos_update_request(&dmic->pm_qos_req, dmic->latency);
233 if (cpu_latency_qos_request_active(&dmic->pm_qos_req))
234 cpu_latency_qos_update_request(&dmic->pm_qos_req,
235 dmic->latency);
235
236 /* Configure uplink threshold */
237 omap_dmic_write(dmic, OMAP_DMIC_FIFO_CTRL_REG, dmic->threshold);
238
239 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
240
241 /* Set dmic out format */
242 ctrl &= ~(OMAP_DMIC_FORMAT | OMAP_DMIC_POLAR_MASK);

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237 /* Configure uplink threshold */
238 omap_dmic_write(dmic, OMAP_DMIC_FIFO_CTRL_REG, dmic->threshold);
239
240 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
241
242 /* Set dmic out format */
243 ctrl &= ~(OMAP_DMIC_FORMAT | OMAP_DMIC_POLAR_MASK);

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