tegra_pcm.h (9a64e8e0ace51b309fdcff4b4754b3649250382a) tegra_pcm.h (df79f55df3992fdd5dd206de6aa9af6a8ec1f86f)
1/*
2 * tegra_pcm.h - Definitions for Tegra PCM driver
3 *
4 * Author: Stephen Warren <swarren@nvidia.com>
5 * Copyright (C) 2010,2012 - NVIDIA, Inc.
6 *
7 * Based on code copyright/by:
8 *

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35
36struct tegra_pcm_dma_params {
37 unsigned long addr;
38 unsigned long wrap;
39 unsigned long width;
40 unsigned long req_sel;
41};
42
1/*
2 * tegra_pcm.h - Definitions for Tegra PCM driver
3 *
4 * Author: Stephen Warren <swarren@nvidia.com>
5 * Copyright (C) 2010,2012 - NVIDIA, Inc.
6 *
7 * Based on code copyright/by:
8 *

--- 26 unchanged lines hidden (view full) ---

35
36struct tegra_pcm_dma_params {
37 unsigned long addr;
38 unsigned long wrap;
39 unsigned long width;
40 unsigned long req_sel;
41};
42
43#if defined(CONFIG_TEGRA_SYSTEM_DMA)
43struct tegra_runtime_data {
44 struct snd_pcm_substream *substream;
45 spinlock_t lock;
46 int running;
47 int dma_pos;
48 int dma_pos_end;
49 int period_index;
50 int dma_req_idx;
51 struct tegra_dma_req dma_req[2];
52 struct tegra_dma_channel *dma_chan;
53};
44struct tegra_runtime_data {
45 struct snd_pcm_substream *substream;
46 spinlock_t lock;
47 int running;
48 int dma_pos;
49 int dma_pos_end;
50 int period_index;
51 int dma_req_idx;
52 struct tegra_dma_req dma_req[2];
53 struct tegra_dma_channel *dma_chan;
54};
55#endif
54
55int tegra_pcm_platform_register(struct device *dev);
56void tegra_pcm_platform_unregister(struct device *dev);
57
58#endif
56
57int tegra_pcm_platform_register(struct device *dev);
58void tegra_pcm_platform_unregister(struct device *dev);
59
60#endif