tegra20_ac97.h (8be98d2f2a0a262f8bf8a0bc1fdf522b3c7aab17) tegra20_ac97.h (26e91f61d6b91ccfb0bbb15cbc81845dd1d223af)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * tegra20_ac97.h - Definitions for the Tegra20 AC97 controller driver
4 *
5 * Copyright (c) 2012 Lucas Stach <dev@lynxeye.de>
6 *
7 * Partly based on code copyright/by:
8 *

--- 66 unchanged lines hidden (view full) ---

75#define TEGRA20_AC97_FIFO_SCR_PB_EMPTY_MT_EN (1 << 8)
76
77struct tegra20_ac97 {
78 struct clk *clk_ac97;
79 struct snd_dmaengine_dai_dma_data capture_dma_data;
80 struct snd_dmaengine_dai_dma_data playback_dma_data;
81 struct reset_control *reset;
82 struct regmap *regmap;
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * tegra20_ac97.h - Definitions for the Tegra20 AC97 controller driver
4 *
5 * Copyright (c) 2012 Lucas Stach <dev@lynxeye.de>
6 *
7 * Partly based on code copyright/by:
8 *

--- 66 unchanged lines hidden (view full) ---

75#define TEGRA20_AC97_FIFO_SCR_PB_EMPTY_MT_EN (1 << 8)
76
77struct tegra20_ac97 {
78 struct clk *clk_ac97;
79 struct snd_dmaengine_dai_dma_data capture_dma_data;
80 struct snd_dmaengine_dai_dma_data playback_dma_data;
81 struct reset_control *reset;
82 struct regmap *regmap;
83 int reset_gpio;
84 int sync_gpio;
83 struct gpio_desc *reset_gpio;
84 struct gpio_desc *sync_gpio;
85};
86#endif /* __TEGRA20_AC97_H__ */
85};
86#endif /* __TEGRA20_AC97_H__ */