acp.h (d0e99511834b6828c960e978d9a8cb6e5731250d) acp.h (b5ba646142195d63dd1aae69bc15457fca5aeb78)
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2/*
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
7 *
8 * Author: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>

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67#define MBOX_STATUS_MASK 0xFFFF
68
69#define BOX_SIZE_512 0x200
70#define BOX_SIZE_1024 0x400
71
72#define EXCEPT_MAX_HDR_SIZE 0x400
73#define AMD_STACK_DUMP_SIZE 32
74
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2/*
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
7 *
8 * Author: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>

--- 58 unchanged lines hidden (view full) ---

67#define MBOX_STATUS_MASK 0xFFFF
68
69#define BOX_SIZE_512 0x200
70#define BOX_SIZE_1024 0x400
71
72#define EXCEPT_MAX_HDR_SIZE 0x400
73#define AMD_STACK_DUMP_SIZE 32
74
75#define SRAM1_SIZE 0x13A000
76
75enum clock_source {
76 ACP_CLOCK_96M = 0,
77 ACP_CLOCK_48M,
78 ACP_CLOCK_24M,
79 ACP_CLOCK_ACLK,
80 ACP_CLOCK_MCLK,
81};
82

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77enum clock_source {
78 ACP_CLOCK_96M = 0,
79 ACP_CLOCK_48M,
80 ACP_CLOCK_24M,
81 ACP_CLOCK_ACLK,
82 ACP_CLOCK_MCLK,
83};
84

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